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TPS61372

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SLVSEE7 – JUNE 2018

Product Folder Links: TPS61372

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Copyright © 2018, Texas Instruments Incorporated

8.3 Feature Description

8.3.1 Under-voltage Lockout

The under voltage lockout circuit prevents the device from malfunctioning at the low input voltage of the battery

8.3.2 Enable and Disable

When the input voltage is above UVLO threshold and the EN pin is pulled above the high threshold (1.2V

minimum), the TPS61372 is enabled. When the EN pin is pulled below the low threshold (0.4V maximum), the

TPS61372 goes into the shutdown mode.

8.3.3 Error Amplifier

The TPS61372 has a trans-conductance amplifier and compares the feedback voltage with the internal voltage

reference (or the internal soft start voltage during startup phase). The trans-conductance of the error amplifier is

175 µA / V typically. The loop compensation components are placed between the COMP terminal and ground for

optimizing the loop stability and response speed.

8.3.4 Bootstrap Voltage (BST)

The TPS61372 has an integrated bootstrap regulator, and requires a small ceramic capacitor between the BST

and SW pin to provide the gate drive voltage for the high-side FET. The value of this ceramic capacitor is

recommended between 20 nF to 200 nF.

8.3.5 Load Disconnect

The TPS61372 device provides a load disconnect function, which completely disconnects the output from the

input during shutdown or output short conditions.

8.3.6 Minimum On Time

The on time is determined by the current sensing comparing with the output of the error amplifier. To avoid the

falsely trigger the on timer termination, there is a blanking time added, which is typically 50ns.The other delay

time mainly includes the comparison time of comparator, the transmission delay time of gate driving, which

results into an additional 20ns typically. The minimum on time of TPS61372 is typically 70ns.

8.3.7 Over-voltage Protection

protection threshold (with 500mV hysteresis). This function prevents the devices against the over-voltage and

secures the circuits connected to the output from excessive over voltage.

8.3.8 Thermal Shutdown

A thermal shutdown is implemented to prevent the damage due to the excessive heat and power dissipation.

Typically, the thermal shutdown occurs at the junction temperature exceeding 140°C. When the thermal

shutdown is triggered, the device stops switching and recover when the junction temperature falls below 120°C

(typical).

8.4 Device Functional Modes

8.4.1 Operation

In light load condition, the TPS61372 implements Auto PFM mode for applications requiring high efficiency at

light load. And also the device could be configured as forced PWM mode for applications requiring fixed

switching frequency to avoid unexpected switching noise interference.