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AD9574

Data Sheet

Rev. B | Page 16 of 35

Pin No.

Mnemonic

Input/Output

Pin Type

Description

REF_SW

Output

3.3 V CMOS

Reference Switchover Status Indicator. This pin indicates when the device is in

the process of switching references (see the Reference Monitor section for more

information).

REF_ACT

Output

3.3 V CMOS

Reference Active Status Indicator. This pin indicates whether REF0 or REF1 is the

active reference (see the Reference Monitor section for more information).

MCLK_P

Input

Configurable

monitor clock

input

Reference Monitor Clock Normal Input. Configurable via PPR6 (Pin 18).

MCLK_N

Input

Configurable

monitor clock

input

Reference Monitor Clock Complementary Input. Configurable via PPR6 (Pin 18).

PPR0

Input

Control

Pin Program Reader 0. Connect a resistor to this pin to configure the reference

clock inputs (see the PPR0—Reference Clock Input Configuration section for

more information).

REF_SEL

Input

3.3 V CMOS

Reference Clock Select. The pin selects Input Reference Clock 0 or Input

Reference Clock 1 as the internal reference clock source (Logic 0 or Logic 1,

respectively). This pin has an internal 30 kΩ pull-down resistor.

Input

GND

Exposed Pad. The exposed die pad must be connected to the power supply

common (GND).

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