Data Sheet

AD9574

Rev. B | Page 19 of 35

REFERENCE SWITCHING FREQUENCY AND PHASE DISTURBANCE

disturbance plots (see Figure 18 and Figure 19) each show a collection of output phase variations due to approximately 250 reference

switching events between two references with a frequency offset of approximately 2 ppm. Each reference switch event (initiated by

toggling the REF_SEL pin) occurs at a random phase offset between the two references. The plots demonstrate the tightly controlled

phase disturbance at the output as a result of the reference switching logic seeking the optimal moment to switch references.

–45000

–40000

–35000

–30000

–25000

–20000

–15000

–10000

–5000

0

5000

15000

20000

25000

30000

35000

40000

45000

50000

–1.5

–0.5

0.5

1.5

2.5

RELATIVE TIME (µs)

–1 PPM REFERENCE

FREQUENCY OFFSET

+1 PPM REFERENCE

FREQUENCY OFFSET

Figure 17. Reference Switchover Frequency Disturbance for OUT2 at

156.25 MHz (PPR0 = 0, PPR1 = 1, PPR2 = 2, PPR3 = 0, PPR4 = 0, PPR5 = 0,

PPR6 = 2)

0

5

6

7

–0.2

0

RELATIVE TIME (µs)

2

3

4

1

–3

–2

–1

–6

–5

–4

–7

–0.1

0.1

0.3

0.2

10 DEGREES

1 DEGREE = 17.78ps

Figure 18. Reference Switchover Phase Disturbance for OUT3 at 156.25 MHz

(PPR0 = 0, PPR1 = 1, PPR2 = 3, PPR3 = 2, PPR4 = 1, PPR5 = 7, PPR6 = 7)

2.0

1.0

0

–1.0

–2.0

–0.2

–0.1

0

0.1

0.2

RELATIVE TIME (µs)

0.3

–1.5

–0.5

0.5

1.5

1.5 DEGREES

1 DEGREE = 111.1ps

Figure 19. Reference Switchover Phase Disturbance for OUT0 at 25 MHz with

Output ×2 Multiplier Bypassed (PPR0 = 0, PPR1 = 1, PPR2 = 3, PPR3 = 2,

PPR4 = 1, PPR5 = 7, PPR6 = 7)