SCD1284 datasheet(102/176 Pages) INTEL

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CD1284 — IEEE 1284-Compatible Parallel Interface Controller

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break;

}

outportb(PFCR, inportb(PFCR & 0xEF);/* clear IntEn (first step of ‘toggle’

operation */

outportb(PFCR, inportb(PFCR | 0x10);/* set IntEn (second step of ‘toggle’

operation */

outportb(CAR, save_car);

/* restore original CAR (if desired) */

return(0);

}

6.5.2

Hardware-Activated Service Examples

Hardware-activated context switching is nearly identical to the serial case; during the service

acknowledge cycle, the SVCACKP* input is active and the CD1284 drives the parallel channel

vector on the data bus. At the same time, the MPU pushes the current state of the device on the

context stack and sets the context for channel 0. The vector comes from the PIVR, which is a

reflection of the LIVR. The vector supplied indicates the source of the request in the IT2-IT0 bits.

There is no equivalent to the Interrupting Channel register (TICR, RICR, MICR) since, by

definition, the interrupt is from channel 0. Once the context switch occurs, the CPU can proceed to

service the source of the request.

The CPU must decode the ITx bits to determine the blocks that require service. Each section of the

parallel channel has an Interrupt Status register to indicate what conditions, if any, in that block

require service. These are the PFSR in the data path and the PCISR in the channel control state

machine.

At the end of the service routine, the CPU must perform the same dummy write operation to the

EOSRR as for the serial channels. This informs the device that the parallel service is complete.

The write operation to the EOSRR generates a high-priority interrupt to the MPU to cause it to pop

the context stack and restores the device environment to what it was at the start of the interrupt

service.

6.6

Baud Rate Derivation

/* This is a simple code example which shows a way to derive the proper values for

the RCOR/TCOR and RBPR/TBPR register pairs for any baud rate. Routine is called with

the desired baud rate and master clock; global variables cor and bpr are set by the

routine. */

int

brp, cor;

compute_baud(clock, baud_rate)

double

clock;

double

baud_rate;

{

double

cor_values[ ] = {8.0, 32.0, 128.0, 512.0, 2048.0, -1.0};

int

for ( i = 0; cor_values[i] != -1; i++ )

{

brp = (int) ((( clock / baud_rate) / cor_values[i]) + 0.5);

if (brp < 0xFF)

{

cor = i;

bpr = brp;

break;

}

SCD1284 Datasheet(PDF) 102 Page - Intel Corporation

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