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AD5316R

Data Sheet

Rev. C | Page 16 of 24

THEORY OF OPERATION

DIGITAL-TO-ANALOG CONVERTER

The AD5316R is a quad, 10-bit, serial input, voltage output DAC

with an internal reference. The part operates from supply

voltages of 2.7 V to 5.5 V. Data is written to the AD5316R in a

24-bit word format via a 2-wire serial interface. The AD5316R

incorporates a power-on reset circuit to ensure that the DAC

output powers up to a known output state. The device also has

a software power-down mode that reduces the typical current

consumption to 1 µA.

TRANSFER FUNCTION

The internal reference is on by default. Because the input coding

to the DAC is straight binary, the ideal output voltage when using

an external reference is given by









REF

OUT

Gain

where:

VREF is the value of the external reference.

Gain is the gain of the output amplifier and is set to 1 by default.

The gain can be set to 1 or 2 using the gain select pin. When the

GAIN pin is tied to GND, all four DAC outputs have a span of

0 V to VREF. When this pin is tied to VDD, all four DAC outputs

have a span of 0 V to 2 × VREF.

D is the decimal equivalent of the binary code that is loaded to

the DAC register (0 to 1023).

N is the DAC resolution (10 bits).

DAC ARCHITECTURE

The DAC architecture consists of a string DAC followed by an

output amplifier. Figure 39 shows a block diagram of the DAC

architecture.

INPUT

2.5V

REF

DAC

RESISTOR

STRING

REF (+)

VREF

GND

REF (–)

VOUTX

GAIN

(GAIN = 1 OR 2)

Figure 39. Single DAC Channel Architecture Block Diagram

The resistor string structure is shown in Figure 40. Each resistor

in the string has a value R. The code loaded to the DAC register

determines the node on the string from which the voltage is

tapped off and fed into the output amplifier. The voltage is

tapped off by closing one of the switches that connect the string

to the amplifier. Because the AD5316R is a string of resistors, it

is guaranteed monotonic.

TO OUTPUT

AMPLIFIER

VREF

Figure 40. Resistor String Structure

Internal Reference

The AD5316R on-chip reference is on at power-up but can be

disabled via a write to a control register. For more information,

see the Internal Reference Setup section.

The 2.5 V, 2 ppm/°C internal reference provides a full-scale

output of 2.5 V or 5 V, depending on the state of the GAIN pin.

The internal reference is available at the VREF pin. This buffered

reference is capable of driving external loads of up to 10 mA.

Output Amplifiers

The output buffer amplifier can generate rail-to-rail voltages on

its output for an output range of 0 V to VDD. The actual range

depends on the value of VREF, the GAIN pin, the offset error,

and the gain error. The GAIN pin selects the gain of the output.

•

When this pin is tied to GND, all four outputs have a gain

of 1, and the output range is from 0 V to VREF.

•

When this pin is tied to VDD, all four outputs have a gain

of 2, and the output range is from 0 V to 2 × VREF.

The output amplifiers are capable of driving a load of 1 kΩ in

parallel with 2 nF to GND. The slew rate is 0.8 V/µs with a ¼

to ¾ scale settling time of 5 µs.

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