ADP3168 datasheet(12/24 Pages) AD

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ADP3168

Rev. B | Page 12 of 24

DYNAMIC VID

The ADP3168 incorporates the ability to dynamically change

the VID input while the controller is running. This allows the

output voltage to change while the supply is running and

supplying current to the load. This is commonly referred to as

VID on-the-fly (OTF). A VID OTF can occur under either light

load or heavy load conditions. The processor signals the

controller by changing the VID inputs in multiple steps from

the start code to the finish code. This change can be either

positive or negative.

When a VID input changes state, the ADP3168 detects the

change and ignores the DAC inputs for a minimum of 400 ns.

This prevents a false code due to logic skew while the six VID

inputs are changing. Additionally, the first VID change initiates

the PWRGD and CROWBAR blanking functions for a mini-

mum of 250 µs to prevent a false PWRGD or CROWBAR event.

Each VID change resets the internal timer. Figure 10 shows VID

on-the-fly performance when the output voltage is stepping up

and the output current is switching between minimum and

maximum values, which is the worst-case situation.

Figure 10. VID On-the-Fly Waveforms, Circuit of Figure 12.

VID Change = 5 mV, 5 µs per Step, 50 Steps, IOUT Change =5 A to 65 A

POWER-GOOD MONITORING

The Power-Good comparator monitors the output voltage via

the CSREF pin. The PWRGD pin is an open-drain output

whose high level (when connected to a pull-up resistor)

indicates that the output voltage is within the nominal limits

specified in Table 1 based on the VID voltage setting. PWRGD

goes low if the output voltage is outside of this specified range.

PWRGD is blanked during a VID OTF event for a period of

250 µs to prevent false signals during the time the output is

changing.

OUTPUT CROWBAR

As part of the protection for the load and output components of

the supply, the PWM outputs are driven low (turning on the

low-side MOSFETs) when the output voltage exceeds the upper

Power-Good threshold. This crowbar action stops once the

output voltage has fallen below the release threshold of

approximately 450 mV.

Turning on the low-side MOSFETs pulls down the output as the

reverse current builds up in the inductors. If the output over-

voltage is due to a short of the high-side MOSFET, this action

current limits the input supply or blows its fuse, protecting the

microprocessor from destruction.

OUTPUT ENABLE AND UVLO

The input supply (VCC) to the controller must be higher than

the UVLO threshold, and the EN pin must be higher than its

logic threshold for the ADP3168 to begin switching. If UVLO is

less than the threshold or the EN pin is a logic low, the

ADP3168 is disabled. This holds the PWM outputs at ground,

shorts the DELAY capacitor to ground, and holds the ILIMIT

pin at ground.

In the application circuit, the ILIMIT pin should be connected

to the OD pins of the ADP3418 drivers. Because ILIMIT is

grounded, this disables the drivers so that both DRVH and

DRVL are grounded. This feature is important to prevent

discharging of the output capacitors when the controller is shut

off. If the driver outputs were not disabled, a negative voltage

could be generated on the output due to the high current

discharge of the output capacitors through the inductors.

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