LXT9880 datasheet(53/118 Pages) INTEL

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Advanced 10/100 Repeater with Integrated Management — LXT9860/9880

Datasheet

Document #: 248987

Revision#: 003

Rev Date: 08/07/01

3.10.1.1

Serial Clock

SERCLK is a bidirectional pin; direction control is provided by the RECONFIG input. If

RECONFIG is High, the LXT98x0 drives SERCLK at 625 kHz. If RECONFIG is Low, SERCLK

is an input, between 0 and 2 MHz. The clock can be stopped after each operation, as long as an idle

(at least 12 ones in a row) is transmitted first.

3.10.1.2

Serial Data I/O

The serial data pins, SRX and STX, should be “logically” tied together using open-collector

buffers. See Figure 23 on page 68. The SRX input is compared with the STX output. If a mismatch

occurs, STX goes to a high impedance. STX is driven on the falling edge of SERCLK. SRX is

sampled on the rising edge.

3.10.2

Read and Write Operations

Data can be read or written in blocks. The LXT98x0 can read the full length field of consecutive

counters with a single access. Block writes are limited to 2 long words.

Normally the network manager directs read and write operations to a specific LXT98x0 device

using a two-part address consisting of HubID and Chip Address.

Note:

In the Header Field, the Chip Address is defined by three bits. The Most Significant Bit (MSB) = 0;

the value of the other two bits is set by pins.

The LXT98x0 responds to an operation within 12 serial controller bit times. In the case of an error

during a transfer, the LXT98x0 does not implement the requested command.

3.10.2.1

SMI Collision Handling

Upon colliding with another packet, the LXT98x0 ceases transmission, based on the bit pattern of

the colliding packets as shown in Figure 12. In the case of a collision, the driver who is sourcing a

0 wins. The LXT98x0 does not retry a response, unless it was an address arbitration packet. In

addition, if an address arbitration packet jumps in during a request/response sequence, before the

addressed LXT98x0 has responded, the addressed LXT98x0 aborts the requested operation.

Note:

The minimum time between packets must be at least 12 bit times with the data set to all ones.

3.10.2.2

SMI Address Match Indication

The LXT98x0 SER_MATCH pin (see Figure 13) indicates detection of a serial command matching

the device Hub ID. Broadcast commands also trigger the SER_MATCH output. Note that the initial

HubID upon power-up or reset is the Broadcast (all ones) address.

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