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ADV7183ABST Datasheet(PDF) 83 Page - Analog Devices |
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ADV7183ABST Datasheet(HTML) 83 Page - Analog Devices |
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83 / 104 page ![]() ADV7183A Rev. A | Page 83 of 104 Table 190. Register 0x31 Bit Subaddress Register Bit Description 7 6 5 4 3 2 1 0 Comments Notes 0x31 Reserved 0 1 0 Set to default 0 Start of line relative to HSE HSE = Hsync end HVSTIM. Selects where within a line of video the VS signal is asserted. 1 Start of line relative to HSB HSB = Hsync begin 0 EAV/SAV codes generated to suit ADI encoders NEWAVMODE. Sets the EAV/SAV mode. 1 Manual VS/Field position controlled by registers 0x32, 0x33, and 0xE5–0xEA VS and FIELD Control 1 Reserved 0 0 0 Set to default Table 191. Register 0x32 to 0x33 Bit Subaddress Register Bit Description 7 6 5 4 3 2 1 0 Comments Notes 0x32 Reserved 0 0 0 0 0 1 Set to default VSBHE 0 VS goes high in the middle of the line (even field) 1 VS changes state at the start of the line (even field) VSBHO 0 VS goes high in the middle of the line (odd field) VSync Field Control 2 1 VS changes state at the start of the line (odd field) 0x33 Reserved 0 0 0 1 0 0 Set to default NEWAVMODE bit must be set high VSEHE 0 VS goes low in the middle of the line (even field) 1 VS changes state at the start of the line (even field) VSEHO 0 VS goes low in the middle of the line (odd field) VSync Field Control 3 1 VS changes state at the start of the line odd field NEWAVMODE bit must be set high |
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