AD8152 datasheet(20/32 Pages) AD

20 / 32 page

REV. A

–20–

AD8152

of these two currents will flow through the switches and the current

source of the AD8152 output circuit and out through VEE.

The power dissipated in the transmission line and the destination

resistor will not be dissipated in the AD8152, but will have to be

supplied from the power supply, and is a factor in the overall system

power. The current in the on-chip termination resistors and the

output current source will dissipate power in the AD8152 itself.

Input Termination Resistors

The power dissipated in the input termination resistors is

delivered by the driving source. First, assume the driving wave-

form for an individual input is a differential square wave with an

amplitude of Vinpp. Then the power dissipated in this input is

(Vinpp)

2/2Rterm.

However, this result is quite pessimistic, because at high fre-

quencies, the wave shape is usually more sinusoidal than square.

If instead, a differential sine wave of amplitude Vinpp is assumed,

then its rms amplitude is 0.7 times that of a square wave. This will

yield a power that is one half of the square wave case. The assumed

wave shape is not too critical because the fraction of the power

dissipated in the input termination resistors is not very large.

A further effect is that the input signal might travel over a path

that attenuates the signal. This will usually be a function of

frequency. Thus, for such a case, some of the signal power will

be dissipated in the signal path. This will reduce the amount of

power dissipated in the AD8152 input terminations.

If dc coupling is used, a dc current will flow from VTTI through

the termination resistors if the dc voltage of the drive circuit is not

equal to VTTI. The additional power in each input termination

resistor will be the current that flows multiplied by the 50

value of the input terminations.

For a point of reference, assume a channel has a sinusoidal input of

800 mV p-p differential. The power dissipated for a single input

will be 3.2 mW. If all 34 input channels are driven the same, then

the power in the input terminations will be 109 mW.

Input Stage

The input stages are powered down when not in use. There is

about 2 mA that flows through an enabled input from VCC to VEE.

Thus, the power dissipated by an enabled input is 5 mW for a

supply of 2.5 V and 6.6 mW for a 3.3 V supply. For all 34 inputs

enabled, the respective figures are 170 mW for a 2.5 V supply

and 224 mW for a 3.3 V supply.

Switch Matrix

The switch matrix draws a fixed 32 mA when the AD8152 is

powered. This current flows from VCC to VEE. The power dissi-

pation from this current is 80 mW at 2.5 V and 106 mW at 3.3 V.

Output Predrivers

The output predrivers draw additional current when each of the

outputs is enabled. This extra current is proportional to the

programmed output current. The extra predriver current for a

channel will be 25 percent of the programmed output current

for that channel. This current will also flow from VCC to VEE.

When an output is enabled and programmed to 16 mA, an addi-

tional 4 mA will flow in the predriver section. This will dissipate

10 mW at 2.5 V or 13.2 mW at 3.3 V for an individual output.

For all 34 outputs enabled and programmed to 16 mA, the

predriver power will be 340 mW at 2.5 V or 449 mW at 3.3 V.

OUTPUTS

The output current is forced by a current source that is pro-

grammed to a variable amount of current from 2 mA to 32 mA

in 2 mA steps. For the two logic switch states, this current flows

through an on-chip termination resistor and a parallel path to the

destination device and its termination resistor. The power in this

parallel path is not dissipated by the AD8152.

The nominal programmed output current is 16 mA. With the two

parallel 50

W resistors at each collector (25 W equivalent), this

current will create a 400 mV p-p swing in each half of the circuit.

The differential output voltage will be 800 mV p-p.

Under steady state conditions and with a data pattern that is

run-length limited so that its low frequency content is significantly

higher than the RC pole formed by the coupling capacitor and the

termination resistors, the common-mode level at the AD8152

outputs will be 400 mV lower than VTTO. Each output will then

swing

±200 mV from this level, which is a 400 mV p-p single-

ended output swing.

At the high level, there will be 200 mV across the termination

resistor. This will dissipate a power of 0.8 mW. At the low level, the

600 mV across the termination resistor will dissipate a power of

7.2 mW. Since the output signal is basically 50% duty cycle, the

average power dissipated will be the average of these two values

or 4 mW. By symmetry, the other differential output will dissipate

the same power. This yields an on-chip termination-resistor

power dissipation of 8 mW per channel for each output, or 272 mW

for all 34 outputs.

The full output current (from both on- and off-chip termination

resistors) will flow in the lower part of each output. This current

flows only in the side that is “on,” or in its low state (VOL). This

voltage is 600 mV below the dc level at VTTO.

Thus, for VTTO = 2.5 V, VOL = 1.9 V, and the power dissipa-

tion for IOUT = 16 mA is 30.4 mA. For all 34 channels, the

power is 1.03 W.

If VTTO = 3.3 V, then VOL = 2.7 V. The single power is 43.2 mW

and the power for all 34 channels is 1.47 W.

If VTTO = 2.5 V, then the additional power is given by 16 mA

¥ [(2.5 V – (16 mA ¥ 25 W)] = 33.6 mW. Thus, the total AD8152

power dissipation for this output is 37.6 mW.

If all 34 outputs are enabled with the same IOUT, the total power

dissipation is 1.28 W. Thus it can be seen that the outputs are

the major contributor to the power dissipation.

Power Saving Considerations

While the AD8152 power consumption is very low compared to

similar devices, careful control of its operating conditions can yield

further power savings. Significant power reduction can be realized

by operating the part at a lower voltage. Compared to 3.3 V

operation, a supply voltage of 2.5 V can result in power savings of

about 25 percent. There is virtually no performance penalty when

operating at lower voltage.

A second measure is to disable outputs when they are not being

used. This can be done on a static basis if the output is not used,

or on a dynamic basis if the output does not have a constant

stream of traffic.

Since the majority of the power dissipated is in the output stage,

some of its flexibility can be used to lower the power consumption.

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