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M263 Datasheet(PDF) 362 Page - Nuvoton Technology Corporation |
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M263 Datasheet(HTML) 362 Page - Nuvoton Technology Corporation |
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362 / 398 page ![]() M261/M262/M263 Mar 25, 2020 Page 362 of 398 Rev 1.02 ISK2 (Quasi-bidirectional, Push-pull Mode, Set GPIO to output LOW, Apply GPIO pin VIN=(VSS+0.4)V for VSS and measure the source current) 4.102 - 12.351 mA VDD = VDDIO = 1.8V ITL Logic 1 to 0 Transition Current (Quasi-bidirectional Mode) - -70 - uA VDD = VDDIO = 3.3V VIN=2.0V CIO I/O pin capacitance - 4.2 - pF Notes: 1. Guaranteed by characterization result, not tested in production. 2. The ISR and ISK must always respect the abslute maximum current and the sum of I/O, CPU and peripheral must not exceed ΣIDD and ΣISS. Table 8.3-9 PIN Output Characteristics Symbol Parameter Min Typ Max unit Test Conditions VILR Negative going threshold (Schmitt input), nRESET - - 0.3*VDD V VDD = 3.3V VIHR Positive going threshold (Schmitt Input), nRESET 0.7*VDD - - V VDD = 3.3V RRST Internal nRESET pin pull up resistor 50 - 56.8 KΩ tFR1 nRESET input filtered time - 32 - uS tFR2 nRESET input filtered time under SPD and DPD mode - 300 - nS VDD = 3.3V, Notes: 1. Guaranteed by characterization result, not tested in production. 2. It is recommended to add a 10 kΩ and 10uF capacitor at nRESET pin to keep reset signal stable. Table 8.3-10 nRESET Pin Characteristics |
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