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K32L3A Datasheet(PDF) 97 Page - NXP Semiconductors |
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K32L3A Datasheet(HTML) 97 Page - NXP Semiconductors |
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97 / 162 page ![]() Table 65. Power consumption operating behaviors in regulator mode (continued) Symbol Description Temp (°C) Active core LDO (VDD_DCDC=3V) DCDC (VDD_DCDC=3.3V ) Unit Notes Typ. Max Typ. Max 1 6.363 6.999 4.165 4.582 0 & 1 13.813 15.194 7.859 8.645 IDD_DCDC Active core in high speed RUN Inactive core in STOP Coremark benchmark code; Execution from flash Core Vdd = 1.4V Core clock = 72MHz 25 0 10.232 11.255 5.963 6.559 mA 1 8.033 8.836 4.699 5.169 0 & 1 15.751 17.326 8.647 9.512 70 0 10.347 11.382 6.265 6.892 1 7.881 8.836 4.683 5.152 0 & 1 16.036 17.640 9.005 9.905 85 0 10.878 11.965 6.352 6.987 1 8.394 9.234 5.074 5.581 0 & 1 16.714 18.386 8.937 9.830 105 0 12.123 13.335 6.979 7.677 1 9.735 10.709 5.552 6.108 0 & 1 17.831 19.614 9.812 10.793 IDD_DCDC Active core in WAIT Inactive core in STOP All peripheral clocks disabled 25 0 2.732 3.005 2.103 2.461 mA 1 2.388 2.626 1.103 2.31 0 & 1 3.231 3.554 2.43 2.675 70 0 2.938 3.232 2.359 2.595 1 2.553 2.809 2.214 2.436 0 & 1 3.487 3.836 2.579 2.837 85 0 3.234 3.557 2.506 2.756 1 2.784 3.063 2.326 2.558 0 & 1 3.853 4.239 2.746 3.020 105 0 3.903 4.332 2.893 3.211 1 3.740 3.667 2.653 2.945 0 & 1 4.672 5.186 3.203 3.556 IDD_DCDC Active core in WAIT Inactive core in STOP All peripheral clocks enabled 25 0 4.398 4.838 2.902 3.193 mA 1 3.740 4.114 2.637 3.901 0 & 1 6.100 6.710 3.587 3.946 70 0 4.610 5.071 3.034 3.337 1 3.921 4.313 2.754 3.029 0 & 1 6.382 7.021 3.754 4.129 85 0 4.917 5.409 3.175 3.493 1 4.168 4.585 2.876 3.163 0 & 1 6.770 7.447 2.935 4.328 105 0 5.587 6.201 3.578 3.972 Table continues on the next page... Electrical characteristics K32L3A, Rev. 1, 09/2019 97 NXP Semiconductors |
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