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W5200 Datasheet(PDF) 73 Page - WIZnet Co., Ltd |
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W5200 Datasheet(HTML) 73 Page - WIZnet Co., Ltd |
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73 / 88 page ![]() © Copyright 2013 WIZnet Co.,Ltd. All rights reserved. 73 6 External Interface For the communication with MCU, W5200 provides SPI I/F modes. For the communication with Ethernet PHY, MII is used. 6.1 SPI (Serial Peripheral Interface) mode Serial Peripheral Interface Mode uses only four pins for data communication. Four pins are CSn, SCLK, MOSI, and MISO. Figure 18 SPI Interface 6.2 Device Operations W5200 is controlled by a set of instruction that is sent from a external host , commonly referred to as the SPI Master. The SPI Master communicates with W5200 via the SPI bus, which is composed of four signal lines: Slave Chip Select (CSn), Serial Clock (SCLK), MOSI (Master Out Slave In) and MISO (Master In Slave Out). The SPI protocol defines four modes for its operation (Mode 0-3). Each mode differs according to the SCLK polarity and phase - how the polarity and phase control the flow of data on the SPI bus. The W5200 operates as SPI Slave device and supports the most common modes - SPI Mode 0 and 3. The only difference between SPI Mode 0 and 3 is the polarity of the SCLK signal at the inactive state. With SPI Mode 0 and 3, data is always latched in on the rising edge of SCLK and always output on the falling edge of SCLK. |
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