W5200 datasheet(9/88 Pages) WIZNET

9 / 88 page

wait for at least 150ms after high de-assert in order for

PLL logic to be stable. Refer to RESET timing of “7

Electrical Specification”

CSn

SPI SLAVE SELECT ( Active LOW )

This pin is used to SPI Slave Select signal Pin when using

SPI interface.

(*)CHIP SELECT ( Active LOW )

Chip Select is for MCU to access to internal registers or

memory when using indirect interface.

INTn

INTERRUPT (Active LOW )

This pin indicates that W5200 requires MCU attention

after socket connecting, disconnecting, data receiving

timeout, and WOL (Wake on LAN). The interrupt is cleared

by writing IR(Interrupt Register) or Sn_IR (Socket n

Interrupt Register). All interrupts are maskable. This pin

is active low.

SCLK/RDn

SPI CLOCK

This pin is used to SPI Clock signal Pin when using SPI

interface.

(*)READ ENABLE ( Active LOW )

Strobe from MCU to read an internal register/memory

selected by A[1:0] when using indirect interface.

MOSI/WRn

SPI MASTER OUT SLAVE IN

This pin is used to SPI MOSI signal pin when using SPI

interface.

(*)WRITE ENABLE ( Active LOW )

Strobe from MCU to write an internal register/memory

selected by A[1:0] when using indirect interface. Data is

latched into the W5200 on the rising edge of this input.

MISO

SPI MASTER IN SLAVE OUT

This pin is used to SPI MISO signal pin.

PWDN

POWER DOWN ( Active HIGH )

This pin is used to power down pin.

Low : Normal Mode Enable

High : Power Down Mode Enable

SPIEN

(*)SPI ENABLE ( Active HIGH )

This pin selects Enable/disable of the SPI Mode.

Low = SPI Mode Disable

High = SPI Mode Enable

W5200 Datasheet(PDF) 9 Page - WIZnet Co., Ltd

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