PMS152 datasheet(49/91 Pages) PADAUK

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PMS152

8bit OTP Type SuLED IO Controller

Page 49 of 91

PDK-DS-PMS152-EN_V105 –Jun. 9, 2020

Fig.14: Hardware diagram of whole set of triple SuLED 11-bit PWM generators

Fig.15: Output Timing Diagram of 11-bit PWM Generator

5.8.3

Equations for 11-bit PWM Generator

PWM Frequency FPWM = F clock source ÷ [ P × (CB10_1 + 1) ]

PWM Duty(in time) = (1 / FPWM) × ( DB10_1 + DB0 × 0.5 + 0.5) ÷ (CB10_1 + 1)

PWM Duty(in percentage) = ( DB10_1 + DB0 × 0.5 + 0.5) ÷ (CB10_1 + 1) × 100%

Where,

P = PWMGCLK [6:4]; pre-scalar P=1, 2, 4, 8, 16, 32, 64, 128

DB10_1 = Duty_Bound[10:1] = {PWMGxDTH[7:0], PWMGxDTL[7:6]},

duty bound

DB0 = Duty_Bound[0] = PWMGxDTL[5]

CB10_1 = Counter_Bound[10:1] = {PWMGCUBH[7:0], PWMGCUBL[7:6]},

counter bound

5.8.4

PWM Waveforms with Complementary Dead Zones

Based on the specific 11 bit PWM architecture of PMS152, here we employ PWM2 output and PWM0 inverse

output after PWM0 xor PWM1 to generate two PWM waveforms with complementary dead zones.

Example program is as follows:

#define

dead_zone

dead time = 10% * (1/PWM_Frequency) us

#define

PWM_Pulse

set 50% as PWM duty cycle

#define

PWM_Pulse_1

set 35% as PWM duty cycle

#define

PWM_Pulse_2

set 60% as PWM duty cycle

Time

0x7FF

Duty[10:0]

Output

bit PWM generation

Time

Output

Counter_Bound[10:1]

Timing Diagram for 11-

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