PMS152 datasheet(27/91 Pages) PADAUK

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PMS152

8bit OTP Type SuLED IO Controller

Page 27 of 91

PDK-DS-PMS152-EN_V105 –Jun. 9, 2020

5. Functional Description

5.1. Program Memory - OTP

The OTP (One Time Programmable) program memory is used to store the program instructions to be executed.

The OTP program memory may contains the data, tables and interrupt entry. After reset, the initial address

0x000 is reserved for system using, so the program will start from 0x001 which is GOTO FPPA0 instruction

usually. The interrupt entry is 0x10 if used, the last 16 addresses are reserved for system using, like checksum,

serial number, etc. The OTP program memory for PMS152 is 1.25KW that is partitioned as Table 1. The OTP

memory from address ‘0x4E6 to 0x4FF is for system using, address space from0x002 to 0x00F and from

0x011 to 0x4E5 are user program spaces.

Address

Function

0x000

System Using

0x001

GOTO FPPA0 instruction

0x002

User program

•

0x00F

User program

0x010

Interrupt entry address

0x011

User program

•

0x4E5

User program

0x4E6

System Using

•

0x4FF

System Using

Table 1: Program Memory Organization

5.2. Boot Procedure

POR (Power-On-Reset) is used to reset PMS152 when power up. The boot up time can be optional fast or

normal. Time for fast boot-up is about 47 ILRC clock cycles whereas 2945 ILRC clock cycles for normal

boot-up. Customer must ensure the stability of supply voltage after power up no matter which option is chosen,

the power up sequence is shown in the Fig. 1 and tSBP is the boot up time.

Please noted, during Power-On-Reset, the VDD must go higher than VPOR to boot-up the MCU.

Fig.1: Power-Up Sequence

PMS152 Datasheet(PDF) 27 Page - PADAUK Technology.

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