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PMS152 Datasheet(PDF) 7 Page - PADAUK Technology.

Part # PMS152
Description  8bit OTP Type SuLED IO Controller
PDF  91 Pages
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Manufacturer  PADAUK [PADAUK Technology.]
Direct Link  http://www.padauk.com.tw/
Logo PADAUK - PADAUK Technology.

PMS152 Datasheet(HTML) 7 Page - PADAUK Technology.

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PMS152
8bit OTP Type SuLED IO Controller
©Copyright 2020, PADAUK Technology Co. Ltd
Page 7 of 91
PDK-DS-PMS152-EN_V105 –Jun. 9, 2020
Revision History:
Revision
Date
Description
0.01
2017/07/21
1
st version
0.02
2018/01/24
1.
Amend the address and phone number of PADAUK Technology Co.,Ltd.
2.
Amend Section 1.3 CPU Features
3.
Amend Section 4.1 AC/DC Device Characteristics
4.
Amend Section 4.3 Typical ILRC frequency vs. VDD
5.
Amend Section 4.4 Typical IHRC frequency deviation vs. VDD
6.
Amend Section 4.5 Typical ILRC Frequency vs. Temperature
7.
Amend Section 4.6 Typical IHRC Frequency vs. Temperature
8.
Amend Section 4.7 Typical operating current vs. VDD @ system clock = ILRC/n
9.
Amend Section 4.8 Typical operating current vs. VDD @ system clock = IHRC/n
10. Amend Section 4.9 Typical operating current vs. VDD @ system clock = 4MHz EOSC / n
11. Amend Section 4.10 Typical operating current vs. VDD @ system clock = 32KHz EOSC / n
12. Amend Section 4.11 Typical operating current vs. VDD @ system clock = 1MHz EOSC / n
13. Amend Section 4.13 Typical IO input high/low threshold voltage (VIH/VIL)
14. Amend Section 4.15 Typical power down current and power save current
15. Delete Section 4.16 Timing charts for boot up conditions
16. Amend Section 5.1. Program Memory – OTP
17. Add Section 5.2.1 Timing charts for reset conditions
18. Amend Table 2: Three oscillation circuits
19. Amend Section 5.4.3. IHRC Frequency Calibration and System Clock
20. Amend Section 5.4.4. External Crystal Oscillator
21. Amend Section 5.4.5. System Clock and LVR level
22. Amend Fig.3: Options of System Clock
23. Amend Section 5.5.2. Using the comparator
24. Amend Section 5.5.3 Using the comparator and band-gap 1.20V
25. Amend Section 5.10 Interrupt
26. Amend Section 5.11.1 Power-Save mode
27. Amend Section 5.11.2 Power-Down mode
28. Amend Section 5.11.3 Wake-up
29. Amend Section 6.3. Clock Mode Register
30. Amend Section 6.7 MISC Register
31. Amend Section 6.10. Port A Digital Input Enable Register
32. Amend Section 6.11. Port B Digital Input Enable Register
33. Delete Section 6.13. MISC2 Register
34. Amend Section 6.14. Port A Pull-High Register
35. Amend Section 6.19. Comparator Selection Register.
36. Amend Section 6.20. Timer2 Control Register
37. Amend Section 6.21. Timer2 Scalar Register
38. Delete the Symbol “pc0” in Chapter 7
39. Amend Chapter 8 Code Options
40. Amend Section 9.2.1. IO pin usage and setting
41. Amend Section 9.2.7 LVR
42. Amend Section 9.2.9 BIT definition
43. Amend Section 9.2.10. Programming Writing
44. Amend Section 9.3. Using ICE



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