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PMS152 Datasheet(PDF) 33 Page - PADAUK Technology. |
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PMS152 Datasheet(HTML) 33 Page - PADAUK Technology. |
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33 / 91 page ![]() PMS152 8bit OTP Type SuLED IO Controller ©Copyright 2020, PADAUK Technology Co. Ltd Page 33 of 91 PDK-DS-PMS152-EN_V105 –Jun. 9, 2020 5.4.5. System Clock and LVR level The clock source of system clock comes from EOSC, IHRC and ILRC, the hardware diagram of system clock in the PMS152 is shown as Fig.3. Fig.3: Options of System Clock User can choose different operating system clock depends on its requirement; the selected operating system clock should be combined with supply voltage and LVR level to make system stable. The LVR level will be selected during compilation. Please refer to Section 4.1. M U X clkmd System clock CLK ÷2, ÷4, ÷8, ÷16, ÷32, ÷64 ÷1, ÷2, ÷4, ÷8 ÷1, ÷4, ÷16 IHRC clock ILRC clock EOSC clock |
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