PMS152 datasheet(64/91 Pages) PADAUK

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PMS152

8bit OTP Type SuLED IO Controller

Page 64 of 91

PDK-DS-PMS152-EN_V105 –Jun. 9, 2020

6.11. Port B Digital Input Enable Register (pbdier), IO address = 0x0e

Bit

Reset

R/W

Description

7 - 6

Enable PB7~PB6 digital input and wake-up event. 1 / 0: enable / disable.

The bit should be set to low when the pad is assigned as comparator input to prevent

leakage current. If the bit is set to low, the pad can NOT be used to wake-up the system.

Enable PB5 digital input and wake-up event and interrupt request. 1 / 0: enable / disable.

This bit can be set to low to disable wake-up from PB5 toggling and interrupt request from

this pin.

4 - 1

1111

Enable PB4~PB1 digital input and wake-up event. 1 / 0: enable / disable.

The bit should be set to low when the pad is assigned as comparator input to prevent

leakage current. If the bit is set to low, the pad can NOT be used to wake-up the system.

Enable PB0 digital input and wake-up event and interrupt request. 1 / 0: enable / disable.

This bit can be set to low to disable wake-up from PB0 toggling and interrupt request from

this pin.

6.12. Port A Data Register (pa), IO address = 0x10

Bit

Reset

R/W

Description

7 - 0

0x00

R/W

Data register for Port A.

6.13. Port A Control Register (pac), IO address = 0x11

Bit

Reset

R/W

Description

7 - 0

0x00

R/W

Port A control registers. This register is used to define input mode or output mode for each

corresponding pin of port A.

0 / 1: input / output

Please note : PA5 is an open drain output.

6.14. Port A Pull-High Register (paph), IO address = 0x12

Bit

Reset

R/W

Description

7 - 0

0x00

R/W

Port A pull-high register. This register is used to enable the internal pull-high device on each

corresponding pin of port A and this pull high function is active only for input mode.

0 / 1 : disable / enable

6.15. Port B Data Register (pb), IO address = 0x14

Bit

Reset

R/W

Description

7 - 0

0x00

R/W

Data register for Port B.

6.16. Port B Control Register (pbc), IO address = 0x15

Bit

Reset

R/W

Description

7 - 0

0x00

R/W

Port B control register. This register is used to define input mode or output mode for each

corresponding pin of port B.

0 / 1: input / output

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