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VT6307 Datasheet(PDF) 18 Page - VIA Technologies, Inc. |
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VT6307 Datasheet(HTML) 18 Page - VIA Technologies, Inc. |
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18 / 54 page ![]() VT6307 PCI 1394a Host Controller Revision 1.2 October 1, 2002 -12- Pinouts Technologies, Inc. We Connect We Connect We Connect We Connect Cable Interface and PHY Signals Signal Name VT6307/L Pin # VT6307S Pin# I/O Signal Description XTPA0P 73 70 IO Port 0 Twisted Pair A Positive. XTPA0M 72 69 IO Port 0 Twisted Pair A Negative. XTPB0P 71 68 IO Port 0 Twisted Pair B Positive. XTPB0M 70 67 IO Port 0 Twisted Pair B Negative. XTPA1P 80 77 IO Port 1 Twisted Pair A Positive. XTPA1M 79 76 IO Port 1 Twisted Pair A Negative. XTPB1P 78 75 IO Port 1 Twisted Pair B Positive. XTPB1M 77 74 IO Port 1 Twisted Pair B Negative. XTPBIAS0 XTPBIAS1 74 81 71 78 O Port 2-0 Twisted Pair Bias Voltages. Provides 1.85V (typical) nominal bias for proper operation of the twisted-pair cable drivers and receivers, and for signaling to the remote nodes that the cable connections are active. High-impedance during chip reset or power down. Can be disabled via remote packets or via software. Each of these pins must be decoupled with a 0.33-uF capacitor to ground. XCPS 63 60 I Cable Power Status. This pin is normally connected to the cable power through an 11K Ohm / 1K Ohm voltage divider. An internal comparator is used to detect the presence of cable power. XREXT 66 63 A External Resistor. A 6.34K Ohm ±1% resistor to ground is required for internal current source operation. XI 60 57 I Crystal Input. These pins must be connected to a 24.576 MHz parallel resonant fundamental mode crystal. XO 61 58 O Crystal Output. |
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