HT46C23 datasheet(17/48 Pages) HOLTEK

17 / 48 page

HT46R23/HT46C23

Rev. 1.60

May 3, 2004

f S Y S / 2

P W M

[ P W M ] = 1 0 0

[ P W M ] = 1 0 1

P W M

[ P W M ] = 1 0 2

P W M

[ P W M ] = 1 0 3

P W M

P W M m o d u l a t i o n p e r i o d : 1 2 8 / f S Y S

5 0 / 1 2 8

5 1 / 1 2 8

5 2 / 1 2 8

5 0 / 1 2 8

5 1 / 1 2 8

5 0 / 1 2 8

5 1 / 1 2 8

5 2 / 1 2 8

M o d u l a t i o n c y c l e 0

P W M c y c l e : 2 5 6 / f S Y S

M o d u l a t i o n c y c l e 1

M o d u l a t i o n c y c l e 0

(7+1) PWM Mode

f S Y S / 2

P W M

[ P W M ] = 1 0 0

[ P W M ] = 1 0 1

P W M

[ P W M ] = 1 0 2

P W M

[ P W M ] = 1 0 3

P W M

P W M c y c l e : 2 5 6 / f S Y S

2 5 / 6 4

2 6 / 6 4

2 5 / 6 4

2 6 / 6 4

2 5 / 6 4

2 6 / 6 4

2 5 / 6 4

2 6 / 6 4

M o d u l a t i o n c y c l e 0

P W M m o d u l a t i o n p e r i o d : 6 4 / f S Y S

M o d u l a t i o n c y c l e 1

M o d u l a t i o n c y c l e 2

M o d u l a t i o n c y c l e 3

M o d u l a t i o n c y c l e 0

(6+2) PWM Mode

A/D Converter

The 8 channels and 10-bit resolution A/D (9-bit accu-

racy) converter are implemented in this microcontroller.

The reference voltage is VDD. The A/D converter con-

tains 4 special registers which are; ADRL (24H), ADRH

(25H), ADCR (26H) and ACSR (27H). The ADRH and

ADRL are A/D result register higher-order byte and

lower-order byte and are read-only. After the A/D con-

version is completed, the ADRH and ADRL should be

read to get the conversion result data. The ADCR is an

A/D converter control register, which defines the A/D

channel number, analog channel select, start A/D con-

version control bit and the end of A/D conversion flag. If

the users want to start an A/D conversion. Define PB

configuration, select the converted analog channel, and

give START bit a raising edge and falling edge

®1®0). At the end of A/D conversion, the EOCB bit is

cleared and an A/D converter interrupt occurs (if the A/D

converter interrupt is enabled). The ACSR is A/D clock

setting register, which is used to select the A/D clock

source.

The A/D converter control register is used to control the

A/D converter. The bit2~bit0 of the ADCR are used to

select an analog input channel. There are a total of eight

channels to select. The bit5~bit3 of the ADCR are used

to set PB configurations. PB can be an analog input or

as digital I/O line decided by these 3 bits. Once a PB line

is selected as an analog input, the I/O functions and

pull-high resistor of this I/O line are disabled and the A/D

converter circuit is power on. The EOCB bit (bit6 of the

ADCR) is end of A/D conversion flag. Check this bit to

know when A/D conversion is completed. The START

bit of the ADCR is used to begin the conversion of the

A/D converter. Giving START bit a rising edge and fall-

ing edge means that the A/D conversion has started. In

order to ensure the A/D conversion is completed, the

START should remain at

²0² until the EOCB is cleared to

²0² (end of A/D conversion).

The bit 7 of the ACSR is used for testing purposes only.

It can not be used by the users. The bit1 and bit0 of the

ACSR are used to select A/D clock sources.

HT46C23 Datasheet(PDF) 17 Page - Holtek Semiconductor Inc

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