HT46C23 datasheet(24/48 Pages) HOLTEK

24 / 48 page

HT46R23/HT46C23

Rev. 1.60

May 3, 2004

D a t a

S = S t a r t ( 1 b i t )

S A = S l a v e A d d r e s s ( 7 b i t s )

S R = S R W b i t ( 1 b i t )

M = S l a v e d e v i c e s e n d a c k n o w l e d g e b i t ( 1 b i t )

D = D a t a ( 8 b i t s )

A = A C K ( R X A K b i t f o r t r a n s m i t t e r , T X A K b i t f o r r e c e i v e r 1 b i t )

P = S t o p ( 1 b i t )

S C L

S t a r t

S D A

S R W

A C K

S t o p

S C L

S D A

S A

S R

S A

S R

S l a v e A d d r e s s

2C Communication Timing Diagram

Acknowledge Bit

One of the slave device generates an acknowledge signal,

when the slave address is matched. The master device

can check this acknowledge bit to know if the slave device

accepts the calling address. If no acknowledge bit, the

master must send a STOP bit and end the communication.

When the I

2C Bus status register bit 6 HAAS is high, it

means the address is matched, so the slave must check

SRW as a transmitter (set HTX) to

²1² or as a receiver

(clear HTX) to

²0².

Data Byte

The data is 8 bits and is sent after the slave device has

acknowledges the slave address. The first bit is MSB

and the 8th bit is LSB. The receiver sends the acknowl-

edge signal (

²0²) and continues to receive the next one

byte data. If the transmitter checks and there

¢snoac-

knowledge signal, then it release the SDA line, and the

master sends a STOP signal to release the I

2C Bus. The

data is stored in the HDR register. The transmitter must

write data to the HDR before transmit data and the re-

ceiver must read data from the HDR after receiving

data.

S C L

S D A

S t a r t b i t

D a t a

s t a b l e

D a t a

a l l o w

c h a n g e

S t o p b i t

Data Timing Diagram

S C L

S D A

Stop Bit

HT46C23 Datasheet(PDF) 24 Page - Holtek Semiconductor Inc

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