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HT46C23 Datasheet(PDF) 22 Page - Holtek Semiconductor Inc |
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HT46C23 Datasheet(HTML) 22 Page - Holtek Semiconductor Inc |
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22 / 48 page ![]() HT46R23/HT46C23 Rev. 1.60 22 May 3, 2004 Note: 1. Write the I 2C Bus address register (HADR) to define its own slave address. 2. Set HEN bit of I 2C Bus control register (HCR) bit 0 to enable the I 2C Bus. Label (HCR) Bits Function HEN 7 To enable or disable I 2C Bus function (0= disable; 1= enable) ¾ 6~5 Unused bit, read as ²0² HTX 4 To define the transmit/receive mode (0= receive mode; 1= transmit) TXAK 3 To enable or disable transmit acknowl- edge (0=acknowledge; 1=don ¢t acknowledge) ¾ 2~0 Unused bit, read as ²0² HCR Register 3. Set EHI bit of the interrupt control register 1 (INTC1) bit 0 to enable the I 2C Bus interrupt. Label (HSR) Bits Function HCF 7 HCF is clear to ²0² when one data byte is being transferred, HCF is set to ²1² indi- cating 8-bit data communication has been finished. HAAS 6 HAAS is set to ²1² when the calling ad- dress has matched, and I 2C Bus inter- rupt will occur and HIF is set. HBB 5 HBB is set to ²1² when I2C Bus is busy and HBB is cleared to ²0² means that the I 2C Bus is not busy. ¾ 4~3 Unused bit, read as ²0² SRW 2 SRW is set to ²1² when the master wants to read data from the I 2C Bus, so the slave must transmit data to the master. SRW is cleared to ²0² when the master wants to write data to the I 2C Bus, so the slave must receive data from the master. ¾ 1 Unused bit, read as ²0² RXAK 0 RXAK is cleared to ²0² when the master receives an 8-bit data and acknowledg- ment at the 9th clock, RXAK is set to ²1² means not acknowledged. HSR Register S t a r t W r i t e S l a v e A d d r e s s t o H A D R S E T H E N I 2 C B u s I n t e r r u p t = ? E n a b l e D i s a b l e S E T E H I W a i t f o r I n t e r r u p t G o t o M a i n P r o g r a m C L R E H I P o l l H I F t o d e c i d e w h e n t o g o t o I 2 C B u s I S R G o t o M a i n P r o g r a m |
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