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TMP139AIYAHT Datasheet(PDF) 43 Page - Texas Instruments |
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TMP139AIYAHT Datasheet(HTML) 43 Page - Texas Instruments |
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43 / 58 page  Table 7-28. MR32: Temperature Sensor Critical Temperature High Limit-Low Byte Field Descriptions Bit Field Type Reset Description 7:0 TS_CRIT_HIGH_LIMIT_LOW[7:0] RW 50h Low byte of the critical high limit temperature for the thermal sensor.1 MR33 and MR32 together define the critical high limit temperature for the thermal sensor. 1. The bits marked as R-0, shall not be updated when host writes 1 and shall read as 0. 7.6.17 MR33: Temperature Sensor Critical Temperature High Limit-High Byte Configuration (address = 21h) [reset = 05h] The status flag for critical temperature high limit is set when the result of the temperature conversion is greater than the programmed value in the MR33 and MR32 registers. The application must ensure that the critical temperature high limit registers must have a value greater than the temperature high limit registers. Return to Register Map. Figure 7-63. MR33: Temperature Sensor Critical Temperature High Limit-High Byte Configuration Register 7 6 5 4 3 2 1 0 TS_CRIT_HIGH_LIMIT_HIGH[7:0] R-0 R-0 R-0 RW-05h Table 7-29. MR33: Temperature Sensor Critical Temperature High Limit-High Byte Field Descriptions Bit Field Type Reset Description 7:0 TS_CRIT_HIGH_LIMIT_HIGH[7:0] RW 05h High byte of the critical high limit temperature for the thermal sensor.1 MR33 and MR32 together define the critical high limit temperature for the thermal sensor. 1. The bits marked as R-0, shall not be updated when host writes 1 and shall read as 0. 7.6.18 MR34: Temperature Sensor Critical Temperature Low Limit-Low Byte Configuration (address = 22h) [reset = 00h] The status flag for critical temperature low limit is set when the result of the temperature conversion is less than the programmed value in the MR35 and MR34 registers. The application must ensure that the critical temperature low limit registers must have a value lesser than the temperature low limit registers. Return to Register Map. Figure 7-64. MR34: Temperature Sensor Critical Temperature Low Limit-Low Byte Configuration Register 7 6 5 4 3 2 1 0 TS_CRIT_LOW_LIMIT_LOW[7:0] RW-00h R-0 R-0 Table 7-30. MR34: Temperature Sensor Critical Temperature Low Limit-Low Byte Field Descriptions Bit Field Type Reset Description 7:0 TS_CRIT_LOW_LIMIT_LOW[7:0] RW 00h Low byte of the critical low limit temperature for the thermal sensor.1 MR35 and MR34 together define the critical low limit temperature for the thermal sensor. 1. The bits marked as R-0, shall not be updated when host writes 1 and shall read as 0. www.ti.com TMP139 SNIS217 – DECEMBER 2020 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 43 Product Folder Links: TMP139 |
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