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TMP139AIYAHT Datasheet(PDF) 22 Page - Texas Instruments |
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TMP139AIYAHT Datasheet(HTML) 22 Page - Texas Instruments |
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22 / 58 page ![]() The TMP139 shall NACK the address phase, during a Repeated Start, if there was an error in the previous transaction. 7.4.5 In Band Interrupt The In Band Interrupt (IBI) is an elegant method to inform the host of an event in the TMP139. There are two types of events that the TMP139 generates: 1. Error event: Events corresponding to parity or PEC error. 2. Temperature event: Events corresponding to the temperature exceeding the higher temperature limits or falling below the lower temperature limits. By default, all interrupt sources are disabled when the device powers up. The interrupt source can only be enabled when the device is in I3C basic mode of operation, as enabling the interrupt source shall generate an IBI which is not allowed in I2C mode of operation. An IBI can only be requested by the TMP139 when the bus has been in an inactive state for the TAVAL period. Once the condition for an inactive state on the bus is met, and there is no bus transaction, the TMP139 shall initiate an IBI by driving the SDA low to indicate to the host of a pending IBI. 7.4.5.1 In Band Interrupt Arbitration Rules Based on the state of the host controller readiness and due to the fact that there are multiple devices on the bus, the IBI generation and arbitration must follow some rules, as described below. All of these conditions assume that the bus has been inactive for TAVAL period. 1. When the host controller starts a write or read with IBI header, TMP139 shall start driving its own address on the bus. The host on seeing a value other than the IBI header shall no longer drive the SDA, allowing the TMP139 to transmit its device header along with R/W bit set to 1. 2. If the host controller can accept the IBI from the device, it shall ACK the device address, release the bus on the falling edge of SCL and shall accept the bytes sent by the TMP139. 3. If the host controller cannot accept the IBI from the device, it shall NACK the device address and issue a Stop condition on the bus. The TMP139 shall retry another IBI only after TAVAL period. 4. When the host controller starts a write or read without an IBI header to a device on the bus which has a lower device address than the TMP139, the device on detecting a mismatch, shall no longer participate on the bus and retry another IBI only after TAVAL period. 5. When the host controller starts a write or read without an IBI header to a device on the bus which has a higher device address than the TMP139, the device wins the bus arbitration and the host shall no longer participate on the bus. The host may accept the IBI by sending an ACK or disregard the IBI by sending a NACK. In the latter case, TMP139 shall retry another IBI only after TAVAL period. 6. When the host controller starts a write or read transaction without an IBI header to the TMP139 which is also requesting an IBI, either the host or TMP139 can win. 7. If the host controller starts a write transaction, then it shall win the bus arbitration and the TMP139 shall let go of the bus. The TMP139 shall retry another IBI only after TAVAL period. 8. If the host controller starts a read transaction, then all the bits shall match. However at this point the host is expecting an ACK from the TMP139 for the read request, while the TMP139 is waiting for an ACK from the host for the IBI. As a result there shall be a NACK on the bus. In such a case, the TMP139 shall retry the IBI only after TAVAL period. However if the host issues start (or Repeated Start) and attempts the read transaction before the TAVAL period, it shall get an ACK from the TMP139 and the host read shall win the arbitration on the bus. 9. As described above, in the case when there are multiple devices initiating an IBI at the same time, the device which has the lowest device address shall win the bus arbitration and the TMP139 when it detects a loss on the bus arbitration, shall retry another IBI only after TAVAL period 7.4.5.2 In Band Interrupt Bus Transaction As shown in Figure 7-23 and Figure 7-24, when the device has to send an IBI, wins arbitration on the bus and the IBI is ACK by the host, it shall always send the mandatory data byte (MDB) as 8'h00, followed by the MR51 and MR52 register values. After transmitting the last byte, it shall set the T-bit as 0, after which the host controller must send a Stop condition on the bus. TMP139 SNIS217 – DECEMBER 2020 www.ti.com 22 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMP139 |
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