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LAN7430 Datasheet(PDF) 66 Page - Microchip Technology |
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LAN7430 Datasheet(HTML) 66 Page - Microchip Technology |
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66 / 77 page ![]() LAN7430/LAN7431 DS00002631D-page 66 2018-2019 Microchip Technology Inc. 7.6.8 JTAG TIMING This section specifies the JTAG timing of the device. FIGURE 7-13: JTAG TIMING TABLE 7-21: JTAG TIMING VALUES Symbol Description Min Typ Max Units ttckp TCK clock period 40 ns ttckhl TCK clock high/low time ttckp*0.4 ttckp*0.6 ns tsu TDI, TMS setup to TCK rising edge 10 ns th TDI, TMS hold from TCK rising edge 10 ns tdov TDO output valid from TCK falling edge 15 ns tdoinvld TDO output invalid from TCK falling edge 0 ns Note: JTAG timing values are with respect to an equivalent test load of 25 pF. TCK (Input) TDI, TMS (Inputs) ttckhl ttckp ttckhl tsu th tdov TDO (Output) tdohinvld |
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