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AD4696 Datasheet(PDF) 7 Page - Analog Devices

Part # AD4696
Description  16-Bit, 16-Channel, 500 kSPS/1 MSPS, Easy Drive Multiplexed SAR ADCs
PDF  96 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD4696 Datasheet(HTML) 7 Page - Analog Devices

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Data Sheet
AD4695/AD4696
Rev. 0 | Page 7 of 96
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
fS = 500 kSPS
2.6
3.3
mA
fS = 1 MSPS
5.2
6.6
mA
VDD Current (Conversion Mode)
VDD = 1.8 V, internal LDO disabled
Reference High-Z Mode Disabled,
Analog Input High-Z Mode Disabled
fS = 10 kSPS
42
µA
fS = 500 kSPS
2
mA
fS = 1 MSPS
4
mA
Reference High-Z Mode Enabled,
Analog Input High-Z Mode Enabled
fS = 10 kSPS
53
µA
fS = 500 kSPS
2
3.2
mA
fS = 1 MSPS
5
6.4
mA
VIO Dynamic Current
VIO = 1.8 V
Register Configuration Mode
Streaming mode, SCK frequency (fSCK) = 50 MHz
125
µA
Conversion Mode
Status bits enabled
fS = 10 kSPS
3.5
µA
fS = 500 kSPS
162
µA
fS = 1 MSPS
325
360
µA
POWER DISSIPATION7
AVDD = 5 V, VIO = 1.8 V
Standby Power Dissipation
Internal LDO Disabled
VDD = 1.8 V
4
µW
Internal LDO Enabled
LDO_IN = 5 V
46
µW
Power Dissipation, Internal LDO Disabled
LDO_IN = AGND, VDD = 1.8 V
Reference High-Z Mode Disabled,
Analog Input High-Z Mode Disabled
fS = 10 kSPS
85
µW
fS = 500 kSPS
4
mW
fS = 1 MSPS
8
mW
Reference High-Z Mode Enabled,
Analog Input High-Z Mode Enabled
fS = 10 kSPS
170
µW
fS = 500 kSPS
8
9.8
mW
fS = 1 MSPS
16
19.5
mW
Power Dissipation, Internal LDO Enabled
LDO_IN = 5 V
Reference High-Z Mode Disabled,
Analog Input High-Z Mode Disabled
fS = 10 kSPS
270
µW
fS = 500 kSPS
10.5
mW
fS = 1 MSPS
21
mW
Reference High-Z Mode Enabled,
Analog Input High-Z Mode Enabled
fS = 10 kSPS
395
µW
fS = 500 kSPS
16.5
20.5
mW
fS = 1 MSPS
33
41.0
mW
Autocycle Mode Power Dissipation
LDO_IN = 5 V, internal LDO enabled,
autocycle mode enabled
AC_CYC = 0x0
2.3
mW
AC_CYC = 0x7
0.2
mW
TEMPERATURE RANGE
Specified Performance
TMIN to TMAX
−40
+125
°C
1
See the Channel Configuration Options section for a detailed description of unipolar mode, pseudo bipolar mode, and the channel pin assignment options.
2
IN+ and IN− represent the analog inputs connected to the positive and negative inputs of the AD4695/AD4696 ADC core via the internal multiplexer (see the
Multiplexer section and Channel Configuration Options section).
3
The analog input leakage current specification refers to the input current of the analog input pins during periods when the ADC is not performing conversions and the
analog input voltage is already settled.
4
Offset error and gain error specifications are taken with the offset and gain correction registers set to the default values, which correspond to no offset or gain
correction. See the Offset and Gain Correction section for more information.
5
%FS is the percentage of the ADC full-scale (see the Transfer Function section for a definition of full scale).
6
REXT and CEXT refer to the resistor and capacitor, respectively, that make up the recommended external RC filters at the analog inputs (see the External RC Filter section).
7
For the power supply current and power dissipation specifications where analog input high-Z mode is enabled, analog input high-Z mode is set to be enabled for all
channels. The power consumption scales with the percentage of conversions performed with analog input high-Z mode enabled.



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