AT90PWM2 datasheet(8/365 Pages) ATMEL

8 / 365 page

AT90PWM2/3

4317B–AVR–02/05

Overview

The AT90PWM2/3 is a low-power CMOS 8-bit microcontroller based on the AVR

enhanced RISC architecture. By executing powerful instructions in a single clock cycle,

the AT90PWM2/3 achieves throughputs approaching 1 MIPS per MHz allowing the sys-

tem designer to optimize power consumption versus processing speed.

Block Diagram

Figure 4. Block Diagram

The AVR core combines a rich instruction set with 32 general purpose working registers.

All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing

two independent registers to be accessed in one single instruction executed in one clock

cycle. The resulting architecture is more code efficient while achieving throughputs up to

ten times faster than conventional CISC microcontrollers.

The AT90PWM2/3 provides the following features: 8K bytes of In-System Programma-

ble Flash with Read-While-Write capabilities, 512 bytes EEPROM, 512 bytes SRAM, 53

general purpose I/O lines, 32 general purpose working registers,three Power Stage

Controllers, two flexible Timer/Counters with compare modes and PWM, one USART

8Kx8 Flash

Program

Memory

Instruction

Decoder

Program

Counter

Control Lines

32 x 8

General

Purpose

Registrers

ALU

Status

and Control

I/O Lines

EEPROM

512 bytes

Data Bus 8-bit

Data

SRAM

512 bytes

Interrupt

Unit

SPI

Unit

Watchdog

Timer

3 Analog

Comparators

DAC

ADC

PSC 2/1/0

Timer 1

Timer 0

DALI USART

AT90PWM2 Datasheet(PDF) 8 Page - ATMEL Corporation

AT90PWM2 Datasheet(HTML) 8 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL