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AT90PWM2 Datasheet(PDF) 100 Page - ATMEL Corporation

Part # AT90PWM2
Description  8-bit Microcontroller with 8K Bytes In-System Programmable Flash
PDF  365 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT90PWM2 Datasheet(HTML) 100 Page - ATMEL Corporation

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100
AT90PWM2/3
4317B–AVR–02/05
Notes:
1. MAX
= 0xFF
2. BOTTOM = 0x00
Timer/Counter Control
Register B – TCCR0B
• Bit 7 – FOC0A: Force Output Compare A
The FOC0A bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR0B is written when operating in PWM mode. When writing a logical one to the
FOC0A bit, an immediate Compare Match is forced on the Waveform Generation unit.
The OC0A output is changed according to its COM0A1:0 bits setting. Note that the
FOC0A bit is implemented as a strobe. Therefore it is the value present in the
COM0A1:0 bits that determines the effect of the forced compare.
A FOC0A strobe will not generate any interrupt, nor will it clear the timer in CTC mode
using OCR0A as TOP.
The FOC0A bit is always read as zero.
• Bit 6 – FOC0B: Force Output Compare B
The FOC0B bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR0B is written when operating in PWM mode. When writing a logical one to the
FOC0B bit, an immediate Compare Match is forced on the Waveform Generation unit.
The OC0B output is changed according to its COM0B1:0 bits setting. Note that the
FOC0B bit is implemented as a strobe. Therefore it is the value present in the
COM0B1:0 bits that determines the effect of the forced compare.
A FOC0B strobe will not generate any interrupt, nor will it clear the timer in CTC mode
using OCR0B as TOP.
The FOC0B bit is always read as zero.
• Bits 5:4 – Res: Reserved Bits
These bits are reserved bits in the AT90PWM2/3 and will always read as zero.
• Bit 3 – WGM02: Waveform Generation Mode
See the description in the “Timer/Counter Control Register A – TCCR0A” on page 97.
• Bits 2:0 – CS02:0: Clock Select
4
100
Reserved
–
–
–
5
1
0
1
PWM, Phase
Correct
OCRA
TOP
BOTTOM
6
110
Reserved
–
–
–
7
111
Fast PWM
OCRA
TOP
TOP
Table 44. Waveform Generation Mode Bit Description (Continued)
Mode
WGM02
WGM01
WGM00
Timer/Count
er Mode of
Operation
TOP
Update of
OCRx at
TOV Flag
Set on
(1)(2)
Bit
7
6
5
4
3
210
FOC0A
FOC0B
–
–
WGM02
CS02
CS01
CS00
TCCR0B
Read/Write
W
W
R
R
R
R
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0



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