AT90PWM2 datasheet(292/365 Pages) ATMEL

292 / 365 page

292

AT90PWM2/3

4317B–AVR–02/05

Parallel Programming

Parameters, Pin

Mapping, and

Commands

This section describes how to parallel program and verify Flash Program memory,

EEPROM Data memory, Memory Lock bits, and Fuse bits in the AT90PWM2/3. Pulses

are assumed to be at least 250 ns unless otherwise noted.

Signal Names

In this section, some pins of the AT90PWM2/3 are referenced by signal names describ-

ing their functionality during parallel programming, see Figure 136 and Table 123. Pins

not described in the following table are referenced by pin names.

The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a posi-

tive pulse. The bit coding is shown in Table 125.

When pulsing WR or OE, the command loaded determines the action executed. The dif-

ferent Commands are shown in Table 126.

Figure 136. Parallel Programming

Table 123. Pin Name Mapping

Signal Name in

Programming Mode

Pin Name

I/O

Function

RDY/BSY

PD1

0: Device is busy programming, 1: Device

is ready for new command

PD2

Output Enable (Active low)

PD3

Write Pulse (Active low)

BS1

PD4

Byte Select 1 (“0” selects Low byte, “1”

selects High byte)

XA0

PD5

XTAL Action Bit 0

XA1

PD6

XTAL Action Bit 1

VCC

GND

XTAL1

XA0

RDY/BSY

RESET

+ 5V

AVCC

+ 5V

PD1

+ 12 V

PD7

PD6

PD5

PD4

PD3

PD2

PE2

XA1

BS2

PAGEL

BS1

DATA

PB[7:0]

AT90PWM2 Datasheet(PDF) 292 Page - ATMEL Corporation

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