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CDCE906 Datasheet(PDF) 1 Page - Texas Instruments

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Part # CDCE906
Description  PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER
PDF  33 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

CDCE906 Datasheet(HTML) 1 Page - Texas Instruments

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FEATURES
TERMINAL ASSIGNMENT
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
S0/A0/CLK_SEL
S1/A1
VCC
GND
CLK_IN0
CLK_IN1
VCC
GND
SDATA
SCLOCK
Y5
Y4
VCCOUT2
GND
Y3
Y2
VCCOUT1
GND
Y1
Y0
PW PACKAGE
(TOP VIEW)
TSSOP 20
Pitch 0,65 mm
6.6 x 6.6
CDCE906
SCAS814 – NOVEMBER 2005
PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER
•
Programmable Down Spread SSC Modulation
(1%, 1.5%, 2%, and 3%)
•
High Performance 2:6 PLL based Clock
Synthesizer / Multiplier / Divider
•
Programmable Output Slew-Rate Control
(SRC) for Lowering System EMI
•
User Programmable PLL Frequencies using
EEPROM Technology
•
Separate Power Supplies for Outputs (2.3 V to
3.6 V) Supports Mixed Power Supply
•
EEPROM Programming Without the Need to
Environments
Apply High Programming Voltage
•
3.3-V Device Power Supply
•
Easy In-Circuit Programming via SMBus Data
Interface
•
Industrial Temperature Range 0
°C to 70°C
•
Wide PLL Divider Ratio Allows 0-ppm Output
•
Development and Programming Kit for Ease
Clock Error
PLL Design and Programming (TI
Pro-Clock™)
•
Generates Precise Video (27 or 54 MHz) and
Audio System Clocks from Multiple Sampling
•
Packaged in 20-Pin TSSOP
Frequencies (fS = 16, 22.05, 24, 32, 44.1, 48, 96
kHz)
•
Clock Inputs Accept a Crystal or a
Single-Ended LVCMOS or a Differential Input
Signal
•
Accepts Crystal Frequencies from 8 MHz up
to 54 MHz
•
Accepts LVCMOS or Differential Input
Frequencies up to 167 MHz
•
Two Programmable Control Inputs [S0/S1,
A0/A1] for User Defined Control Signals
•
Six LVCMOS Outputs with Output
Frequencies up to 167 MHz
•
LVCMOS Outputs can be Programmed for
Complementary Signals (Pseudo Differential
Outputs)
•
Free Selectable Output Frequency via
Programmable Output Switching Matrix [6x6]
Including 7-Bit Post-Divider for Each Output
•
PLL Loop Filter Components Integrated
•
Low Period Jitter (Typ 60 ps)
•
Features Spread Spectrum Clocking (SSC) for
Lowering System EMI
•
Programmable Center Spread SSC Modulation
(±0.1%, ±0.25%, and ±0.4%) with a Mean Phase
Equal to the Phase of the Non-Modulated
Frequency
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Pro-Clock is a trademark of Texas Instruments.
PRODUCT PREVIEW information concerns products in the
Copyright © 2005, Texas Instruments Incorporated
formative or design phase of development. Characteristic data and
other specifications are design goals. Texas Instruments reserves
the right to change or discontinue these products without notice.


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