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CDCE906 Datasheet(PDF) 28 Page - Texas Instruments |
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CDCE906 Datasheet(HTML) 28 Page - Texas Instruments |
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28 / 33 page  www.ti.com −40 −30 −20 −10 0 10 20 30 40 1 1001 2001 3001 4001 5001 6001 7001 8001 9001 10001 Cycle −25 −20 −15 −10 −5 0 5 10 15 20 25 1 1001 2001 3001 4001 5001 6001 7001 8001 9001 10001 Cycle CDCE906 SCAS814 – NOVEMBER 2005 Figure 22. Snapshot of Cycle-to-Cycle Jitter Period jitter (tjit(per)) is the deviation in cycle time of a clock signal with respect to the ideal period (1/fo) over a random sample of cycles. In reference to a PLL, period jitter is the worst-case period deviation from the ideal that would ever occur on the PLLs outputs. This is also referred to as short-term jitter. Figure 23. Snapshot of Period Jitter Phase jitter (tjit(phase)) is the long-term variation of the clock signal. It is the cumulative deviation in t(Θ) for a 28 |
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