ADPD107 datasheet(45/66 Pages) AD

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Data Sheet

ADPD105/ADPD106/ADPD107

Rev. A | Page 45 of 66

Table 27. Configuration Registers to Switch Between the Normal Sample Mode, TIA ADC Mode, and Digital Integration Mode

Address

Data

Bits

Bit Name

Normal

Mode

Value

TIA ADC

Mode Value

Digital

Integration

Mode Value

Description

0x42

[15:8]

SLOTA_AFE_MODE

0x1C

Not applicable

0x1D

In normal mode, this setting configures the

integrator block for optimal operation. In

digital integration mode, this setting

configures the integrator block as a buffer.

This setting is not important for TIA ADC

mode.

SLOTA_INT_AS_BUF

0x0

0x1

Not applicable

0: normal integrator configuration.

1: convert integrator to buffer amplifier (this is

done automatically in digital integrate mode).

0x43

[15:0]

SLOTA_AFE_CFG

0xADA5

0xAE65

Time Slot A AFE connection.

0xAE65 bypasses the band-pass filter.

0xB065 can also be used in TIA ADC mode.

This setting bypasses the BPF and the

integrator.

0x44

[15:8]

SLOTB_AFE_MODE

0x1C

Not applicable

0x1D

In normal mode, this setting configures the

integrator block for optimal operation. In

digital integration mode, this setting

configures the integrator block as a buffer.

This setting is not important for TIA ADC

mode.

SLOTB_INT_AS_BUF

0x0

0x1

Not applicable

0: normal integrator configuration.

1: convert integrator to buffer amplifier (this is

done automatically in digital integrate mode).

0x45

[15:0]

SLOTB_AFE_CFG

0xADA5

0xAE65

Time Slot B AFE connection.

0xAE65 bypasses the band-pass filter.

0xB065 can also be used in TIA ADC mode.

This setting bypasses the BPF and the

integrator.

0x4E

[15:0]

ADC_TIMING

Not

applicable

Not applicable

0x0040

Set ADC clock to 1 MHz in TIA ADC mode.

0x58

SLOTB_DIGITAL_INT_EN

0x0

0x1

Digital integrate mode enable, Time Slot B.

0: disable.

1: enable.

SLOTA_DIGITAL_INT_EN

0x0

0x1

Digital integrate mode enable, Time Slot A.

0: disable.

1: enable.

0x5A

[15:0]

DIG_INT_CFG

Not

applicable

Not applicable

Variable

Configuration of digital integration depends

on the use case. This register is ignored for

other modes.

PULSE CONNECT MODE

In pulse connect mode, the photodiode input connections are

pulsed according to the timing set up in the LED pulse timing

registers. In this mode, if the LED pulse timing is set up to provide

a 2 μs LED pulse, the device pulses the connection to the photo-

diode input for 2 μs instead of providing a 2 μs LED pulse. This

mode is an alternate to TIA ADC mode, allowing the entire

signal path, including the band-pass filter and integrator, to be

used to measure ambient light as well as other types of measure-

ments with different types of sensors (for example, ECGs).

To enable pulse connect mode, the device is configured identically

to normal mode, except that Register 0x14, Bits[3:2] = 0 for

Time Slot B, and Register 0x14, Bits[1:0] = 0 for Time Slot A.

SYNCHRONOUS ECG AND PPG MEASUREMENT

USING TIA ADC MODE

In wearable devices developed for monitoring the health care of

patients, it is often necessary to have synchronized measurements

of biomedical signals. For example, a synchronous measurement of

patient ECG and PPG can be used to determine the pulse wave

transit time (PWTT), which can then be used to estimate blood

pressure.

ADPD107 Datasheet(PDF) 45 Page - Analog Devices

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