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ADPD107 Datasheet(PDF) 54 Page - Analog Devices |
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ADPD107 Datasheet(HTML) 54 Page - Analog Devices |
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54 / 66 page ![]() ADPD105/ADPD106/ADPD107 Data Sheet Rev. A | Page 54 of 66 Address Data Bit Default Value Access Name Description 0x25 [15:11] 0xC R/W ILED3_FINE LEDX3 fine adjust. Current adjust multiplier for LED3. LEDX3 fine adjust = 0.74 + 0.022 × (Register 0x25, Bits[15:11]). See Register 0x22, Bits[3:0], for the full LED3 formula. [10:6] 0xC R/W ILED2_FINE LEDX2 fine adjust. Current adjust multiplier for LED2. LEDX2 fine adjust = 0.74 + 0.022 × (Register 0x25, Bits[10:6]). See Register 0x24, Bits[3:0], for the full LED2 formula. 5 0x0 R/W Reserved Write 0x0. [4:0] 0xC R/W ILED1_FINE LEDX1 fine adjust. Current adjust multiplier for LED1. LEDX1 fine adjust = 0.74 + 0.022 × (Register 0x25, Bits[4:0]). See Register 0x23, Bits[3:0], for the full LED1 formula. 0x30 [15:13] 0x0 R/W Reserved Write 0x0. [12:8] 0x3 R/W SLOTA_LED_WIDTH LED pulse width (in 1 μs step) for Time Slot A. [7:0] 0x20 R/W SLOTA_LED_OFFSET LED offset width (in 1 μs step) for Time Slot A. 0x31 [15:8] 0x08 R/W SLOTA_LED_NUMBER LED Time Slot A pulse count. nA: number of LED pulses in Time Slot A. This is typically LED1. Adjust in the application. A setting of six pulses (0x06) is typical. [7:0] 0x18 R/W SLOTA_LED_PERIOD LED Time Slot A pulse period (in 1 μs step). 0x34 [15:10] 0x00 R/W Reserved Write 0x0. 9 0x0 R/W SLOTB_LED_DIS Time Slot B LED disable. 1: disables the LED assigned to Time Slot B. Register 0x34 keeps the drivers active and prevents them from pulsing current to the LEDs. Disabling both LEDs via this register is often used to measure the dark level. Use Register 0x11 instead to enable or disable the actual time slot usage and not only the LED. 8 0x0 R/W SLOTA_LED_DIS Time Slot A LED disable. 1: disables the LED assigned to Time Slot A. Use Register 0x11 instead to enable or disable the actual time slot usage and not only the LED. [7:0] 0x00 R/W Reserved Write 0x00. 0x35 [15:13] 0x0 R/W Reserved Write 0x0. [12:8] 0x3 SLOTB_LED_WIDTH LED pulse width (in 1 μs step) for Time Slot B. [7:0] 0x20 SLOTB_LED_OFFSET LED offset width (in 1 μs step) for Time Slot B. 0x36 [15:8] 0x08 R/W SLOTB_LED_NUMBER LED Time Slot B pulse count. nB: number of LED pulses in Time Slot B. This is typically LED2. A setting of six pulses (0x06) is typical. [7:0] 0x18 R/W SLOTB_LED_PERIOD LED Time Slot B pulse period (in 1 μs step). AFE GLOBAL CONFIGURATION REGISTERS Table 30. AFE Global Configuration Registers Address Data Bit Default Value Access Name Description 0x37 [15:13] 0x0 R/W CH34_DISABLE Power-down options for Channel 3 and Channel 4 only. Bit 13: power down Channel 3, Channel 4 TIA op amp. Bit 14: power down Channel 3, Channel 4 BPF op amp. Bit 15: power down Channel 3, Channel 4 integrator op amp. [12:10] 0x0 R/W CH2_DISABLE Bit 10: power down Channel 2 TIA op amp. Bit 11: power down Channel 2 BPF op amp. Bit 12: power down Channel 2 integrator op amp. [9:0] 0x000 R/W Reserved Write 0x000. |
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