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Data Sheet

ADPD105/ADPD106/ADPD107

Rev. A | Page 19 of 66

THEORY OF OPERATION

INTRODUCTION

The ADPD105/ADPD106/ADPD107 operate as a complete

optical transceiver stimulating up to three LEDs and measuring

the return signal on up to two separate current inputs. The core

consists of a photometric front end coupled with an ADC, digital

block, and three independent LED drivers. The core circuitry

stimulates the LEDs and measures the return in the analog block

through one to eight photodiode inputs, storing the results in

discrete data locations. The two inputs can be configured to drive

four simultaneous input channels. Data can be read directly by a

an analog signal processing block, digital signal processing block,

I2C communication interface on the ADPD105 or an SPI port on

the ADPD107, and programmable pulsed LED current sources.

The LED driver is a current sink and is agnostic to LED supply

voltage and LED type. The photodiode (PDx) inputs can

accommodate any photodiode with an input capacitance of less

than 100 pF. The ADPD105/ADPD106/ADPD107 are designed

to produce a high SNR for relatively low LED power while greatly

reducing the effect of ambient light on the measured signal.

DUAL TIME SLOT OPERATION

The ADPD105/ADPD106/ADPD107 operate in two independent

time slots, Time Slot A and Time Slot B, which are carried out

sequentially. The entire signal path from LED stimulation to data

capture and processing is executed during each time slot. Each

time slot has a separate datapath that uses independent settings

for the LED driver, AFE setup, and the resulting data. Time Slot A

and Time Slot B operate in sequence for every sampling period, as

shown in Figure 18.

The timing parameters are defined as follows:

tA (μs) = SLOTA_LED_OFFSET + nA × SLOTA_LED_PERIOD

where nA is the number of pulses for Time Slot A (Register 0x31,

Bits[15:8]).

tB (μs) = SLOTB_LED_OFFSET + nB × SLOTB_LED_PERIOD

where nB is the number of pulses for Time Slot B (Register 0x36,

Bits[15:8]).

Calculate the LED period using the following equation:

LED_PERIOD, minimum = 2 × AFE_WIDTH + 11

t1 and t2 are fixed and based on the computation time for each

slot. If a slot is not in use, these times do not add to the total

active time. Table 15 defines the values for these LED and

sampling time parameters.

ACTIVE

SLEEP

TIME SLOT A

TIME SLOT B

ACTIVE

1/fSAMPLE

nA PULSES

nB PULSES

Figure 18. Time Slot Timing Diagram

Table 15. LED Timing and Sample Timing Parameters

Parameter

Bits

Test Conditions/Comments

Min

Typ

Max

Unit

SLOTA_LED_OFFSET1

0x30

[7:0]

Delay from power-up to LEDA rising edge

μs

SLOTB_LED_OFFSET1

0x35

[7:0]

Delay from power-up to LEDB rising edge

μs

SLOTA_LED_PERIOD2

0x31

[7:0]

Time between LED pulses in Time Slot A; SLOTx_AFE_WIDTH = 4 μs

μs

SLOTB_LED_PERIOD2

0x36

[7:0]

Time between LED pulses in Time Slot B; SLOTx_AFE_WIDTH = 4 μs

μs

Compute time for Time Slot A

μs

Compute time for Time Slot B

μs

tSLEEP

Sleep time between sample periods

222

μs

1 Setting the SLOTx_LED_OFFSET below the specified minimum value may cause failure of ambient light rejection for large photodiodes.

2 Setting the SLOTx_LED_PERIOD below the specified minimum value can cause invalid data captures.

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