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ADF7030

Data Sheet

RADIO STATE MACHINE

TheADF7030 operates as a simple state machine. The host

processor can transition the ADF7030 between states by issuing

single-byte commands over the SPI interface. The ADF7030

processor handles the sequencing of various radio circuits and

critical timing functions, thereby simplifying radio operation

and easing the burden on the host processor.

The ADF7030 has eight states designated as PHY_SLEEP,

PHY_OFF, PHY_ON, PHY_RX, PHY_TX, MEASURE_RSSI,

RAM_LOAD_INIT, and CALIBRATING, described in Table 12.

Table 12. ADF7030 Radio States

State

Description

PHY_SLEEP

In this state, the ADF7030 is in a deep sleep

state with no configuration memory

retained.

PHY_OFF

In this state, the ADF7030 executes using its

own internal oscillator clock. The host loads the

firmware module from this state. The host

configures the radio from this state.

PHY_ON

In this state, the external reference clock

source is enabled. After entering this state,

the ADF7030 is ready for the transmission

and reception of packets.

PHY_RX

In this state, the ADF7030 can receive and

process an incoming packet.

PHY_TX

In this state, the ADF7030 transmits the

programmed packet data.

MEASURE_RSSI

In this state, the ADF7030 continuously

measures the RSSI level in the selected

channel and stores this value in dBm for

access by the host. The ADF7030 remains in

this state until commanded to move back to

PHY_ON.

RAM_LOAD_INIT

In this state, the host can write a firmware

module to the ADF7030 RAM memory.

CALIBRATING

In this state, the ADF7030 executes a receive

radio calibration.

Firmware Modules

The host must download firmware modules to the ADF7030

RAM to enable certain aspects of the radio state machine. There

are three firmware modules: transmit, receive, and calibrate.

These modules are described in Table 13.

Table 13. ADF7030 Firmware Modules

Firmware Module

Functionality

RAM_CODE_VX_XXT.DAT

This module is the transmit firmware

module and supports all radio states,

except PHY_RX, CALIBRATING, and

MEASURE_RSSI. VX_XX refers to the

version number.

RAM_CODE_VX_XXR.DAT

This module is the receive firmware

module and supports all radio

states, except PHY_TX and

CALIBRATING. VX_XX refers to the

version number.

RAM_CODE_VX_XXC.DAT

This module is the calibrate

firmware module and supports all

radio states, except PHY_TX, PHY_RX,

and MEASURE_RSSI. VX_XX refers to

the version number.

PACKET HANDLING

The ADF7030 includes comprehensive transmit and receive

packet management capabilities and can be configured for use

with a wide variety of packet-based radio protocols.

The ADF7030 can be programmed to transmit and receive

variable and fixed length packets. The packet data to be

transmitted must be written by the host processor into the

ADF7030 internal memory. Received packet data is available

from the ADF7030 internal memory.

There are 256 bytes of dedicated RAM available to store,

transmit, and receive packets. In transmit mode, a preamble,

sync word, and cyclic redundancy check (CRC) can be added by

the ADF7030 to the payload data stored in the RAM. In receive

mode, the ADF7030 can qualify received packets based on

preamble detection, sync word detection, or CRC validation.

On reception of a valid packet, the received payload data is

loaded to packet memory.

To transmit or receive a packet, the host processor must first

configure the ADF7030. Then, the host processor issues the

commands to place the ADF7030 into the PHY_RX state or the

PHY_TX state. After either state is entered, the ADF7030

automatically starts transmitting or receiving a packet.

The host can track the progress of the transmission or reception

of a packet by monitoring the interrupt signals coming from the

ADF7030. There are two independent logical interrupts from

the ADF7030, and events can be configured to trigger one or

both of these logical interrupts.

The ADF7030 provides two frames in its radio profile that give

flexibility in choosing what packet formats to use in the transmit

and receive operations. A frame can be configured to use one of

several packet formats; it is also possible to switch between these

formats before entering the PHY_TX state or the PHY_RX state.

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