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7.15 Peripheral Characteristics

7.15.1 ADC

7.15.1.1 Analog-to-Digital Converter (ADC) Characteristics

Tc = 25 °C, VDDS = 3.0 V and voltage scaling enabled, unless otherwise noted.(1)

Performance numbers require use of offset and gain adjustments in software by TI-provided ADC drivers.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Input voltage range

VDDS

Resolution

Bits

Sample Rate

200

ksps

Offset

Internal 4.3 V equivalent reference(2)

–0.24

LSB

Gain error

Internal 4.3 V equivalent reference(2)

7.14

LSB

DNL(4)

Differential nonlinearity

>–1

LSB

INL

Integral nonlinearity

±4

LSB

ENOB

Effective number of bits

Internal 4.3 V equivalent reference(2), 200 kSamples/s,

9.6 kHz input tone

9.8

Bits

Internal 4.3 V equivalent reference(2), 200 kSamples/s,

9.6 kHz input tone, DC/DC enabled

9.8

VDDS as reference, 200 kSamples/s, 9.6 kHz input tone

10.1

Internal reference, voltage scaling disabled,

32 samples average, 200 kSamples/s, 300 Hz input tone

11.1

Internal reference, voltage scaling disabled,

14-bit mode, 200 kSamples/s, 300 Hz input tone (5)

11.3

Internal reference, voltage scaling disabled,

15-bit mode, 200 kSamples/s, 300 Hz input tone (5)

11.6

THD

Total harmonic distortion

Internal 4.3 V equivalent reference(2), 200 kSamples/s,

9.6 kHz input tone

–65

VDDS as reference, 200 kSamples/s, 9.6 kHz input tone

–70

Internal reference, voltage scaling disabled,

32 samples average, 200 kSamples/s, 300 Hz input tone

–72

SINAD,

SNDR

Signal-to-noise

and

distortion ratio

Internal 4.3 V equivalent reference(2), 200 kSamples/s,

9.6 kHz input tone

VDDS as reference, 200 kSamples/s, 9.6 kHz input tone

Internal reference, voltage scaling disabled,

32 samples average, 200 kSamples/s, 300 Hz input tone

SFDR

Spurious-free dynamic range

Internal 4.3 V equivalent reference(2), 200 kSamples/s,

9.6 kHz input tone

VDDS as reference, 200 kSamples/s, 9.6 kHz input tone

Internal reference, voltage scaling disabled,

32 samples average, 200 kSamples/s, 300 Hz input tone

Conversion time

Serial conversion, time-to-output, 24 MHz clock

Clock Cycles

Current consumption

Internal 4.3 V equivalent reference(2)

0.42

Current consumption

VDDS as reference

0.6

Reference voltage

Equivalent fixed internal reference (input voltage scaling

enabled). For best accuracy, the ADC conversion should be

initiated through the TI-RTOS API in order to include the gain/

offset compensation factors stored in FCFG1

4.3(2) (3)

Reference voltage

Fixed internal reference (input voltage scaling disabled).

For best accuracy, the ADC conversion should be initiated

through the TI-RTOS API in order to include the gain/offset

compensation factors stored in FCFG1. This value is derived

from the scaled value (4.3 V) as follows:

Vref = 4.3 V × 1408 / 4095

1.48

Reference voltage

VDDS as reference, input voltage scaling enabled

VDDS

Reference voltage

VDDS as reference, input voltage scaling disabled

VDDS /

2.82(3)

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CC2652R7

SWRS253 – MAY 2021

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