IMXRT500EC datasheet(35/119 Pages) NXP

35 / 119 page

J14

J13

TCLK

TRST

Figure 11. TRST timing

1.3.4 Wake-up process

VDD = 3.3 V;Tamb = 25 °C; using FRO as the system clock.

Table 25. Typical wake-up times from low power modes

Symbol

Parameter

Conditions

Notes

Min.

Typ.1

Max.

Unit

twake

wake-up time from sleep

mode, 200

MHz

2, 3

150

μs

twake

wake-up time from deep-

sleep mode,

using

RESETN.

120

μs

from deep-

sleep mode,

using

PMIC_IRQ_N

120

μs

twake

wake-up time from full deep

power-down

mode, using

RESETN

8.64

from full deep

power-down

mode, using

PMIC_IRQ_N

8.64

1. Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply voltages.

2. The wake-up time measured is the time between when a GPIO input pin is triggered to wake the device up from the low

power modes and from when a GPIO output pin is set in the interrupt service routine (ISR) wake-up handler.

3. FRO disbled, all peripherals off. PLL disabled.

4. Wake up from deep power-down causes the part to go through entire reset process. The wake-up time measured is the

time between when the Wake-Up pin is triggered to wake the device up and when a GPIO output pin is set in the reset

handler.

Thermal specifications

i.MX RT500 Low-Power Crossover Processor, Rev. 0, 02/2021

NXP Semiconductors

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