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FXLS93333 Datasheet(PDF) 104 Page - NXP Semiconductors |
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FXLS93333 Datasheet(HTML) 104 Page - NXP Semiconductors |
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104 / 254 page ![]() NXP Semiconductors FXLS9xxxx Dual channel inertial sensor Location Bit Address Register 7 6 5 4 3 2 1 0 $5F CRC_UF2 LOCK_UF2 0 0 0 CRC_UF2[3:0] Unprogrammed OTP Value 0 0 0 0 0 0 0 0 $AF CRC_F_A LOCK_F_A REGA_BLOCKID[2:0] CRC_F_A[3:0] Reset Value 1 0 0 1 Varies $BF CRC_F_B LOCK_F_B REGB_BLOCKID[2:0] CRC_F_B[3:0] Reset Value 1 0 1 0 Varies $CF CRC_F_C LOCK_F_C REGC_BLOCKID[2:0] CRC_F_C[3:0] Reset Value 1 0 1 1 Varies $DF CRC_F_D LOCK_F_D REGD_BLOCKID[2:0] CRC_F_D[3:0] Reset Value 1 1 0 0 Varies $EF CRC_F_E LOCK_F_E REGE_BLOCKID[2:0] CRC_F_E[3:0] Unprogrammed OTP Value 0 0 0 0 0 0 0 0 $FF CRC_F_F LOCK_F_F REGF_BLOCKID[2:0] CRC_F_F[3:0] Unprogrammed OTP Value 0 0 0 0 0 0 0 0 Table 194. Lock and CRC registers Table 195 shows the state of the lock bits, the block identifiers, and the CRC for each register block before and after programming. Lock bit bit[7] Block identifier bits[6:4] CRC bits[3:0] Register block address Before programming After programming Before programming After programming Before programming After programming UF2 0 1 000 000 0000 Varies $Ax 0 1 N/A 001 N/A Varies $Bx 0 1 N/A 010 N/A Varies $Cx 0 1 N/A 011 N/A Varies $Dx 0 1 N/A 100 N/A Varies $Ex 0 1 000 101 0000 Varies $Fx 0 1 000 110 0000 Varies Table 195. Lock bit, block identifier, and CRC states 11.2.48 Reserved registers A register read command to a reserved register or a register with reserved bits will result in a valid response. The data for reserved bits may be logic 0 or logic 1. A register write command to a reserved register or a register with reserved bits will execute and result in a valid response. The data for the reserved bits may be logic 0 or logic 1. A write to the reserved bits must always be '0' for normal device operation and performance. 11.2.49 Invalid register addresses A register read command to a register address outside the addresses listed in Section 11.1 will result in a valid response. The data for the registers will be '0x00'. A register write command to a register address outside the addresses listed in Section 11.1 will not execute, but will result in a valid response. The data for the registers will be '0x00'. A register write command to a read-only register will not execute, but will result in a valid response. The data for the registers will be the current contents of the register. FXLS9xxxx All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 6 — 8 February 2021 104 / 254 |
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