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SLG46585M Datasheet(PDF) 66 Page - Dialog Semiconductor |
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SLG46585M Datasheet(HTML) 66 Page - Dialog Semiconductor |
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66 / 210 page  Datasheet 18-Sep-2019 CFR0011-120-00 Revision 3.3 66 of 210 © 2019 Dialog Semiconductor SLG46585 GreenPAK Programmable Mixed-Signal Matrix with Asynchronous State Machine, LDOs, and DC/DC Converter 7.2.3 Initial Polarity Operations DFF8 nRST/nSET Select [1205] 0: nRST from matrix out 1: nSET from matrix out DFF8 Output Select [1206] 0: Q output 1: nQ output DFF8 or LATCH Select [1207] 0: DFF function 1: LATCH function Figure 19: DFF Polarity Operations with nReset Table 61: DFF8 Register Settings(Continued) Signal Function Register Bit Address Register Definition VDD Data Clock POR nReset (Case 1) Q with nReset (Case 2) Initial Polarity: High Initial Polarity: Low nReset (Case 1) Q with nReset (Case 1) nReset (Case 2) Q with nReset (Case 2) Q with nReset (Case 1) nReset (Case 2) |
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