SLG46585M datasheet(77/210 Pages) DIALOG

77 / 210 page

Datasheet

18-Sep-2019

CFR0011-120-00

Revision 3.3

77 of 210

SLG46585

GreenPAK Programmable Mixed-Signal Matrix with Asynchronous

State Machine, LDOs, and DC/DC Converter

Counter/delay1

Clock Source Select

[1252:1250]

000: Internal OSC clock

001: OSC/4

010: OSC/12

011: OSC/24

100: OSC/64

101: LPOSC

110: External Clock

111: Counter0 Overflow

Counter/delay1

Output Selection for

Counter mode

[1253]

0: Default Output

1: Edge Detector Output

Counter/delay1

Delayed Edge

Output Selection

[1236]

0: Default Output from register [1253]

1: Delayed Edge Detect

Counter/delay1

Mode Selection

[1255:1254]

00: Delay mode

01: One Shot

10: Freq. Detect

11: Counter mode

Counter/delay1

Control Data

[1551:1544]

1 – 256 (delay time = (counter control data +1)/freq)

Table 72: CNT/DLY2 Register Settings

Signal Function

Address

LUT3_8 or

Counter2 Select

[1141]

0: LUT3_8

1: Counter2

Delay2 Mode Select

or asynchronous

counter reset

[1257:1256]

00: on both falling and rising edges (for delay & counter reset)

01: on falling edge only (for delay & counter reset)

10: on rising edge only (for delay & counter reset)

11: no delay on either falling or rising edges/high level reset

Counter/delay2

Clock Source Select

[1260:1258]

000: Internal OSC clock

001: OSC/4

010: OSC/12

011: OSC/24

100: OSC/64

101: LPOSC

110: External Clock

111: Counter1 Overflow

Counter/delay2

Output Selection for

Counter mode

[1261]

0: Default Output

1: Edge Detector Output

Counter/delay2

Delayed Edge

Output Selection

[1235]

0: Default Output from register [1261]

1: Delayed Edge Detect

Counter/delay2

Mode Selection

[1263:1262]

00: Delay mode

01: One Shot

10: Freq. Detect

11: Counter mode

Counter/delay2

Control Data

[1559:1552]

1 – 256 (delay time = (counter control data +1)/freq)

Table 71: CNT/DLY1 Register Settings(Continued)

Signal Function

Address

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