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DA9072 Datasheet(PDF) 34 Page - Dialog Semiconductor

Part # DA9072
Description  Ultra-Low Quiescent Current PMIC
PDF  113 Pages
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Manufacturer  DIALOG [Dialog Semiconductor]
Direct Link  http://www.dialog-semiconductor.com/
Logo DIALOG - Dialog Semiconductor

DA9072 Datasheet(HTML) 34 Page - Dialog Semiconductor

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DA9072
Ultra-Low Quiescent Current PMIC
Datasheet
Revision 3.0
14-Jun-2021
CFR0011-120-00
34 of 113
© 2021 Dialog Semiconductor
4.3.2
Battery Voltage Monitoring
The VBAT_DIV function divides down the Kelvin sensed battery voltage (from VBAT_SNS) and
provides a selectable output, via VBAT_DIV_RATIO (register 0x000E [4]), scaled at 60 % or 30 % of
VBAT. Use the dedicated ground at GND_DIV as the reference point for the VBAT_DIV output.
This is ideal for driving the differential input of an external ADC in battery monitoring functions.
VBAT_DIV is enabled and disabled by bit VBATDIV_EN (register 0x000F [0]). When enabled, the
total resistance from VBAT_SNS to GND is 150 k
Ω. To maintain accuracy, a high impedance
connection is recommended at VBAT_DIV. When disabled the VBAT_DIV resistor divider is
disconnected from VBAT to eliminate current drain.
Table 23: VBAT_DIV Ratios
VBAT_DIV_RATIO Bit (Register 0x000E [4])
VBAT_DIV Ratio
0
0.6 *VBAT
1
0.3 *VBAT
4.4
Battery Charging
4.4.1
Battery Charging Process
When USB power is connected (VDD_PWR > VDD_PWR_UVLO), DA9072 is in one of four states, see
Table 24. Charging is enabled and disabled by the MODE pin and CE_N bit (register 0x0020:[0]).
This status is indicated by the STS_CHG bits (register 0x0002 [5:4]).
Table 24: Charge Status
MODE Pin
CE_N Bits
ICHG Pin
VBAT Pin
Charge Status
STS_CHG Bits
Either High
N/A
N/A
Charge ready
0x0
L
L
> ITER
<= VBAT_CHG
Charge in-
progress
0x1
L
L
< ITER
>= VRCHG
Charge done
0x2
L
L
N/A
N/A
Fault
0x3
STS_CHG bits are read only and shows immediate charge status only. The bits do not hold status
value and change the value immediately when the charge status changes.
From the charge ready state, charging begins when the CE_N bit is low and the MODE input is
pulled low. There is approximately 2.5 ms delay between enabling charging and charge starting.
Charging current operates in three regions based on battery voltage: pre-charge, fast charge (CC),
and constant voltage (CV). These regions are shown in the typical charging example of Figure 23.
The charge status (shown as CHG_STS in the graph) is also shown transitioning from the charge
ready to charge in-progress to charge done states.



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