IMX6SDLCEC datasheet(19/169 Pages) NXP

19 / 169 page

Modules List

i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 9, 11/2018

NXP Semiconductors

uSDHC-1

uSDHC-2

uSDHC-3

uSDHC-4

SD/MMC and SDXC

Enhanced Multi-Media

Card / Secure Digital Host

Controller

Connectivity

Peripherals

i.MX 6Solo/6DualLite specific SoC characteristics:

All four MMC/SD/SDIO controller IPs are identical and

are based on the uSDHC IP. They are:

• Conforms to the SD Host Controller Standard

Specification version 3.0.

• Fully compliant with MMC command/response sets

and Physical Layer as defined in the Multimedia Card

System Specification, v4.2/4.3/4.4/4.41 including

high-capacity (size > 2 GB) cards HC MMC.

• Fully compliant with SD command/response sets and

Physical Layer as defined in the SD Memory Card

Specifications, v3.0 including high-capacity SDHC

cards up to 32 GB and SDXC cards up to 2 TB.

• Fully compliant with SDIO command/response sets

and interrupt/read-wait mode as defined in the SDIO

Card Specification, Part E1, v3.0

All four ports support:

• 1-bit or 4-bit transfer mode specifications for SD and

SDIO cards up to UHS-I SDR104 mode (104 MB/s

max)

• 1-bit, 4-bit, or 8-bit transfer mode specifications for

MMC cards up to 52 MHz in both SDR and DDR

modes (104 MB/s max)

However, the SoC level integration and I/O muxing logic

restrict the functionality to the following:

• Instances #1 and #2 are primarily intended to serve

as external slots or interfaces to on-board SDIO

devices. These ports are equipped with “Card

detection” and “Write Protection” pads and do not

support hardware reset.

• Instances #3 and #4 are primarily intended to serve

interfaces to embedded MMC memory or interfaces

to on-board SDIO devices. These ports do not have

“Card detection” and “Write Protection” pads and do

support hardware reset.

• All ports can work with 1.8 V and 3.3 V cards. There

are two completely independent I/O power domains

for Ports #1 and #2 in four bit configuration (SD

interface). Port #3 is placed in his own independent

power domain and port #4 shares power domain with

some other interfaces.

VDOA

Multimedia

Peripherals

Video Data Order Adapter (VDOA): used to re-order

video data from the “tiled” order used by the VPU to the

conventional raster-scan order needed by the IPU.

VPU

Video Processing Unit

Multimedia

Peripherals

A high-performing video processing unit (VPU), which

covers many SD-level and HD-level video decoders and

SD-level encoders as a multi-standard video codec

engine as well as several important video processing,

such as rotation and mirroring.

See the i.MX 6Solo/6DualLite Reference Manual

(IMX6SDLRM) for complete list of VPU’s

decoding/encoding capabilities.

Table 2. i.MX 6Solo/6DualLite Modules List (continued)

Block Mnemonic

Block Name

Subsystem

Brief Description

IMX6SDLCEC Datasheet(PDF) 19 Page - NXP Semiconductors

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