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IMX6SDLCEC Datasheet(PDF) 57 Page - NXP Semiconductors |
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IMX6SDLCEC Datasheet(HTML) 57 Page - NXP Semiconductors |
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57 / 169 page  Electrical Characteristics i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 9, 11/2018 NXP Semiconductors 57 Figure 16. Synchronous Memory, Write Access, WSC=1, WBEA=0 and WADVN=0 Figure 17. Muxed Address/Data (A/D) Mode, Synchronous Write Access, WSC=6,ADVA=0, ADVN=1, and ADH=1 NOTE In 32-bit muxed address/data (A/D) mode the 16 MSBs are driven on the data bus. Last Valid Address Address V1 D(V1) EIM_BCLK EIM_ADDRxx EIM_DATAxx EIM_WE_B EIM_LBA_B EIM_OE_B EIM_EBx_B EIM_CSx_B WE4 WE5 WE6 WE7 WE8 WE9 WE12 WE13 WE14 WE15 WE16 WE17 EIM_BCLK EIM_WE_B EIM_LBA_B EIM_OE_B EIM_EBx_B EIM_CSx_B Address V1 Write Data WE4 WE16 WE6 WE7 WE9 WE8 WE10 WE11 WE14 WE15 WE17 WE5 Last Valid Address EIM_ADDRxx/ EIM_ADxx |
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