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DS1884 Datasheet(PDF) 39 Page - Maxim Integrated Products

Part # DS1884
Description  SFP and PON ONU Controller with Digital LDD Interface
PDF  92 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

DS1884 Datasheet(HTML) 39 Page - Maxim Integrated Products

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DS1884
SFP and PON ONU Controller
with Digital LDD Interface
39
Maxim Integrated
Register Descriptions
The register maps show each byte/word (2 bytes) in terms of its row in the memory. The first byte in the row is located in
memory at the row address (hexadecimal) in the leftmost column. Each subsequent byte on the row is one/two memory
locations beyond the previous byte/word’s address. A total of 8 bytes are present on each row. For more information
about each of these bytes, see the corresponding register description.
A2h Lower Memory Register Map
A2h Table 01h Register Map
The access codes represent the factory default values of PW_ENA (A2h Table 02h, Register C0h) and PW_ENB (A2h Table 02h,
Register C1h).
Note: The ALARM ENABLE bytes (Registers F8h–FFh) can be configured to exist in A2h Table 05h instead of here at A2h Table
01h with the MASK bit (A2h Table 02h, Register 89h). If the row is configured to exist in A2h Table 05, then these locations are EE
in A2h Table 01h.
LOWER MEMORY
ROW
(HEX)
ROW NAME
WORD 0
WORD 1
WORD 2
WORD 3
BYTE 0/8
BYTE 1/9
BYTE 2/A
BYTE 3/B
BYTE 4/C
BYTE 5/D
BYTE 6/E
BYTE 7/F
00
<1>THRESHOLD0
TEMP ALARM HI
TEMP ALARM LO
TEMP WARN HI
TEMP WARN LO
08
<1>THRESHOLD1
VCC ALARM HI
VCC ALARM LO
VCC WARN HI
VCC WARN LO
10
<1>THRESHOLD2
TXB ALARM HI
TXB ALARM LO
TXB WARN HI
TXB WARN LO
18
<1>THRESHOLD3
TXP ALARM HI
TXP ALARM LO
TXP WARN HI
TXP WARN LO
20
<1>THRESHOLD4
RSSI ALARM HI
RSSI ALARM LO
RSSI WARN HI
RSSI WARN LO
28–37
EMPTY
EMPTY
EMPTY
EMPTY
EMPTY
EMPTY
EMPTY
EMPTY
EMPTY
38–5F
<1>EEPROM
EE
EE
EE
EE
EE
EE
EE
EE
60
<2>ADC VALUES0
TEMP VALUE
VCC VALUE
TXB VALUE
TXP VALUE
68
<0>ADC VALUES1
<2>RSSI VALUE
<2>RESERVED
<2>RESERVED
<0>STATUS
<3>UPDATE
70
<5>ALARM/WARN
ALARM3
ALARM2
RESERVED
RESERVED
WARN3
WARN2
RESERVED
RESERVED
78
<0> TABLE SELECT
<5>RESERVED
<5>RESERVED
<5>RESERVED
<6>PWE MSW
<6>PWE MSW
<6>PWE LSW
<6>PWE LSW
<5>TBL SEL
ACCESS
CODE
<0>
<1>
<2>
<3>
<4>
<5>
<6>
<7>
<8>
<9>
<10>
<11>
Read
Access
See each
bit/byte
separately
All
All
All
PW2
All
N/A
PW1
PW2
N/A
PW2
All
Write
Access
PW2
N/A
All and
device
hardware
PW2 +
mode
bit
All
All
PW1
PW2
PW2
N/A
PW1
A2h TABLE 01h
ROW
(HEX)
ROW NAME
WORD 0
WORD 1
WORD 2
WORD 3
BYTE 0/8
BYTE 1/9
BYTE 2/A
BYTE 3/B
BYTE 4/C
BYTE 5/D
BYTE 6/E
BYTE 7/F
80–BF
<7>EEPROM
EE
EE
EE
EE
EE
EE
EE
EE
C0–F7
<8>EEPROM
EE
EE
EE
EE
EE
EE
EE
EE
F8
<8>ALARM ENABLE
ALARM EN3
ALARM EN2
RESERVED
RESERVED
WARN EN3
WARN EN2
RESERVED
RESERVED



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