IMX7ULPCEC datasheet(60/118 Pages) NXP

60 / 118 page

Figure 11. SD/eMMC4.3 AC timing

Table 31. SD/eMMC4.3 AC parameters

Parameter

Symbols

Min

Max

Unit

Card Input Clock

SD1

Clock Frequency (Low Speed)

fPP1

400

kHz

Clock Frequency (SD/SDIO Full

Speed/High Speed)

fPP2

25/50

MHz

Clock Frequency (MMC Full

Speed/High Speed)

fPP3

20/52

MHz

Clock Frequency (Identification

Mode)

fOD

100

400

kHz

SD2

Clock Low Time

tWL

—

SD3

Clock High Time

tWH

—

SD4

Clock Rise Time

tTLH

—

SD5

Clock Fall Time

tTHL

—

uSDHC Output/Card Inputs SD_CMD, SDx_DATAx (Reference to CLK)

SD6

uSDHC Output Delay

tOD

-3.3

3.6

uSDHC Input/Card Outputs SD_CMD, SDx_DATAx (Reference to CLK)

SD7

uSDHC Input Setup Time

tISU

7.5

—

SD8

uSDHC Input Hold Time4

tIH

1.0

—

1. In Low-Speed mode, card clock must be lower than 400 kHz, voltage ranges from 2.7 to 3.6 V.

2. In Normal (Full) -Speed mode for SD/SDIO card, clock frequency can be any value between 0–25 MHz. In High-speed

mode, clock frequency can be any value between 0–50 MHz.

3. In Normal (Full) -Speed mode for MMC card, clock frequency can be any value between 0–20 MHz. In High-speed

mode, clock frequency can be any value between 0–52 MHz.

Specifications—application domain

i.MX 7ULP Applications Processor—Consumer Products, Rev. 0, 06/2019

NXP Semiconductors

IMX7ULPCEC Datasheet(PDF) 60 Page - NXP Semiconductors

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