IMX7ULPCEC datasheet(10/118 Pages) NXP

10 / 118 page

Table 1. i.MX 7ULP modules list (continued)

Block Name

Block Mnemonic

Subsystem

Power

Domain

Brief description

Direct Memory

Access Multiplexer

DMAMUX0-1

DMA and Bus Fabrics AD, RT

The Direct Memory Access Multiplexer

(DMAMUX) module routes DMA

sources, called slots, to any of the

supported DMA channels. DMAMUX0 is

in the real-time domain. DMAMUX1 is in

the application domain.

Embedded Trace

FIFO

ETF

Debug

The Embedded Trace FIFO (ETF)

consists of a formatter, control, and the

trace RAM. It is a configuration of the

Trace Memory Controller (TMC). The

ETF will have a memory size of

16Kbytes. The ETF and associated

memory should be connected in the

system such that it will retain the

information though a warm or cold reset

of the system. This is to allow for debug

information to be retained for debugging

problems that may arise and cause a

reset of the system.

Embedded Trace

Router

ETR

Debug

The ETR is a trace sink that redirects

the trace stream onto the AXI bus to

external storage. It can utilize a single

contiguous region or a scattered

allocation of blocks for a circular buffer.

Reading of the AXI based trace buffer

can either be done directly over AXI

from a normal bus master. The ETR is a

configuration option of the TMC as is

the ETF.

Extended Resource

Domain Controller

XRDC

Multicore Peripherals

and Resource Domain

Control submodules

AD, RT

The Extended Resource Domain

Controller (XRDC) provides an

integrated, scalable architectural

framework for access control, system

memory protection and peripheral

isolation. It allows software to assign

chip resources (like processor cores,

non-core bus masters, memory regions

and slave peripherals) to processing

domains, to support enforcement of

robust operational environments. The

XRDC implementation is distributed

across multiple submodules instantiated

throughout the device.

External Bus

Interface

FlexBus

Memories and

Memory Controllers

The External Bus Interface (FlexBus)

module provides external memory

expansion and provides connection to

external peripherals with a parallel,

memory-mapped interface. The FlexBus

supports asynchronous and

synchronous interface to external ROM,

NOR flash, SRAM, PSRAM,

Table continues on the next page...

i.MX 7ULP modules list

i.MX 7ULP Applications Processor—Consumer Products, Rev. 0, 06/2019

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