56F8335 datasheet(141/160 Pages) FREESCALE

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Serial Communication Interface (SCI) Timing

56F8335 Technical Data, Rev. 1

Freescale Semiconductor

141

Preliminary

10.12 Serial Communication Interface (SCI) Timing

Figure 10-15 RXD Pulse Width

Figure 10-16 TXD Pulse Width

10.13 Controller Area Network (CAN) Timing

Note: CAN is NOT available in the 56F8135 device.

Table 10-20 SCI Timing1

1. Parameters listed are guaranteed by design.

Characteristic

Symbol

Min

Max

Unit

See Figure

Baud Rate2

2. fMAX is the frequency of operation of the system clock, ZCLK, in MHz, which is 60MHz for the 56F8335 device and

40MHz for the 56F8135 device.

—

(fMAX/16)

Mbps

—

RXD3 Pulse Width

3. The RXD pin in SCI0 is named RXD0 and the RXD pin in SCI1 is named RXD1.

RXDPW

0.965/BR

1.04/BR

10-15

TXD4 Pulse Width

4. The TXD pin in SCI0 is named TXD0 and the TXD pin in SCI1 is named TXD1.

TXDPW

0.965/BR

1.04/BR

10-16

Table 10-21 CAN Timing1

1. Parameters listed are guaranteed by design

Characteristic

Symbol

Min

Max

Unit

See Figure

Baud Rate

BRCAN

—

Mbps

—

Bus Wake Up detection

T WAKEUP

—

µs

10-17

RXDPW

RXD

SCI receive

data pin

(Input)

TXDPW

TXD

SCI receive

data pin

(Input)

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