CD1030 datasheet(40/67 Pages) NXP

40 / 67 page

Analog Integrated Circuit Device Data

NXP Semiconductors

CD1030

7.9.3

Tri-state SP register

The tri-state command is used to set the input nodes as high-impedance (Table 18). By setting the tri-state register bit to logic [1], the

input is high-impedance regardless of the wetting current setting. The configurable comparator (4.0 V default) on each input remains

active. The MCU may change or update the tri-state register via software at any time in Normal mode. The tri-state register defaults to 1

(inputs are tri-stated). Any input in tri-state mode is still polled in LPM but the current source is not active during this time. The

determination of change of state occurs at the end of the tACTIVEPOLL and the wake-up decision is made.

7.9.4

Tri-state SG register

The tri-state command is used to set the input nodes as high-impedance (Table 19). By setting the tri-state register bit to logic [1], the

input is high-impedance regardless of the wetting command setting. The configurable comparator (4.0 V default) on each input remains

active. The MCU may change or update the tri-state register via software at any time in Normal mode. The tri-state register defaults to 1

(inputs are tri-stated). Any input in tri-state is still polled in LPM but the current source is not active during this time. The determination of

change of state occurs at the end of the tACTIVEPOLL and the wake-up decision is made.

Table 18. Tri-state SP register

R/W

SPI data bits [23 - 0]

[31-25]

[24]

bit 23

bit 22

bit 21

bit 20

bit 19

bit 18

bit 17

bit 16

0000_010

0/1

FAULT

STATUS

INTflg

Unused

Default on POR

000

bit 15

bit 14

bit 13

bit 12

bit 11

bit 10

bit 9

bit 8

Unused

SP11

SP10

SP9

SP8

0000

111

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

SP7

SP6

SP5

SP4

SP3

SP2

SP1

SP0

1111

111

MISO Return Word

bit 23

bit 22

bits [21 - 0]

0000_010[R/W]

FAULT

STATUS

INTflg

Table 19. Tri-state SG register

R/W

SPI data bits [23 - 0]

[31-25]

[24]

bit 23

bit 22

bit 21

bit 20

bit 19

bit 18

bit 17

bit 16

0000_011

0/1

FAULT

STATUS

INTflg

Unused

SG20

SG19

SG18

SG17

SG16

Default on POR

111

bit 15

bit 14

bit 13

bit 12

bit 11

bit 10

bit 9

bit 8

SG15

SG14

SG13

SG12

SG11

SG10

SG9

SG8

111

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

SG7

SG6

SG5

SG4

SG3

SG2

SG1

SG0

111

MISO Return Word

bit 23

bit 22

bits [21 - 0]

0000_011[R/W]

FAULT

STATUS

INTflg

CD1030 Datasheet(PDF) 40 Page - NXP Semiconductors

CD1030 Datasheet(HTML) 40 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67

Datasheet Download

Link URL