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CD1030 Datasheet(PDF) 53 Page - NXP Semiconductors

Part # CD1030
Description  33 channel multiple switch detection interface with programmable wetting current
PDF  67 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

CD1030 Datasheet(HTML) 53 Page - NXP Semiconductors

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Analog Integrated Circuit Device Data
53
NXP Semiconductors
CD1030
7.9.25 Wake-up debounce SP
The IC is able to extend the time the active polling takes place to ensure a true change of state has occurred in LPM, and reduce the
chance noise has impacted the measurement. If this bit is [0], the IC uses a voltage difference technique to determine if a switch has
changed state. If this bit is set [1], the IC debounces the measurement by continuing to source the LPM polling current for an additional
1.2 ms and take the measurement based on the final voltage level. This helps to ensure the switch is detected correctly in noisy systems.
7.9.26 Wake-up debounce SG
The IC is able to extend the time the active polling takes place to ensure a true change of state has occurred in LPM, and reduce the
chance noise has impacted the measurement. If this bit is [0], the IC uses a voltage difference technique to determine if a switch has
changed state. If this bit is set [1], the IC debounces the measurement by continuing to source the LPM polling current for an additional
1.2 ms, and take the measurement based on the final voltage level. This helps to ensure the switch is detected correctly in noisy systems.
Table 42. Wake-up debounce SP register
Register Address R/W
SPI Data Bits [23 - 0]
[31-25]
[24]
bit 23
bit 22
bit 21
bit 20
bit 19
bit 18
bit 17
bit 16
0011_010
0/1
FAULT
STATUS
INTflg
Unused
Default on POR
X
X
00
000
0
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
Unused
SP11
SP10
SP9
SP8
0
000
000
0
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
SP7
SP6
SP5
SP4
SP3
SP2
SP1
SP0
0
000
000
0
MISO Return Word
bit 23
bit 22
bits [21 - 0]
0011_010[R/W]
FAULT
STATUS
INTflg
Register Data
Table 43. Wake-up debounce SG register
Register address
R/W
SPI data bits [23 - 0]
[31-25]
[24]
bit 23
bit 22
bit 21
bit 20
bit 19
bit 18
bit 17
bit 16
0011_011
0/1
FAULT
STATUS
INTflg
Unused
SG20
SG19
SG18
SG17
SG16
Default on POR
X
X
00
00
0
0
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
SG15
SG14
SG13
SG12
SG11
SG10
SG9
SG8
000
00
000
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
SG7
SG6
SG5
SG4
SG3
SG2
SG1
SG0
000
00
000
MISO Return Word
bit 23
bit 22
bits [21 - 0]
0011_011[R/W]
FAULT
STATUS
INTflg
Register Data



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