CD1030 datasheet(44/67 Pages) NXP

44 / 67 page

Analog Integrated Circuit Device Data

NXP Semiconductors

CD1030

7.9.11

Continuous wetting current SG register

Each switch input has a designated 20 ms timer. The timer starts when the specific switch input crosses the comparator threshold. When

the 20 ms timer expires, the contact current is reduced from the configured wetting current (16 mA) to 2.0 mA. The wetting current is

defined to be at an elevated level that reduces to the lower sustain current level after the timer has expired. With multiple wetting current

timers disabled, power dissipation for the IC must be considered.

The MCU may change or update the continuous wetting current register via software at any time in Normal mode. This allows the MCU

to control the amount of time wetting current is applied to the switch contact. Programming the continuous wetting current bit to logic [0]

operates normally with a higher wetting current followed by sustain current after 20 ms (Pulse wetting current operation). Programming to

logic [1] enables the continuous wetting current (Table 27) and results in a full time wetting current level. The continuous wetting current

Table 26. Continuous wetting current SP register

R/W

SPI data bits [23 - 0]

[31-25]

[24]

bit 23

bit 22

bit 21

bit 20

bit 19

bit 18

bit 17

bit 16

0001_011

0/1

FAULT

STATUS

INTflg

Unused

Default on POR

000

bit 15

bit 14

bit 13

bit 12

bit 11

bit 10

bit 9

bit 8

Unused

SP11

SP10

SP9

SP8

0000

000

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

SP7

SP6

SP5

SP4

SP3

SP2

SP1

SP0

0000

000

MISO Return Word

bit 23

bit 22

bits [21 - 0]

0001_011[R/W]

FAULT

STATUS

INTflg

Table 27. Continuous wetting current SG register

SPI data bits [23 - 0]

[31-25]

[24]

bit 23

bit 22

bit 21

bit 20

bit 19

bit 18

bit 17

bit 16

0001_100

0/1

FAULT

STATUS

INTflg

Unused

SG20

SG19

SG18

SG17

SG16

Default on POR

bit 15

bit 14

bit 13

bit 12

bit 11

bit 10

bit 9

bit 8

SG15

SG14

SG13

SG12

SG11

SG10

SG9

SG8

000

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

SG7SG6

SG5SG4

SG3SG2

SG1SG0

000

MISO Return Word

bit 23

bit 22

bits [21 - 0]

0001_100[R/W]

FAULT

STATUS

INTflg

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